Contributors: 5
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Rob Herring |
73 |
84.88% |
1 |
20.00% |
| Peter Zijlstra |
9 |
10.47% |
1 |
20.00% |
| Thomas Gleixner |
2 |
2.33% |
1 |
20.00% |
| Mark Charlebois |
1 |
1.16% |
1 |
20.00% |
| Will Deacon |
1 |
1.16% |
1 |
20.00% |
| Total |
86 |
|
5 |
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2012 Calxeda, Inc.
*/
#ifndef _ASM_ARM_PERCPU_H_
#define _ASM_ARM_PERCPU_H_
register unsigned long current_stack_pointer asm ("sp");
/*
* Same as asm-generic/percpu.h, except that we store the per cpu offset
* in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
*/
#if defined(CONFIG_SMP) && !defined(CONFIG_CPU_V6)
static inline void set_my_cpu_offset(unsigned long off)
{
/* Set TPIDRPRW */
asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory");
}
static inline unsigned long __my_cpu_offset(void)
{
unsigned long off;
/*
* Read TPIDRPRW.
* We want to allow caching the value, so avoid using volatile and
* instead use a fake stack read to hazard against barrier().
*/
asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off)
: "Q" (*(const unsigned long *)current_stack_pointer));
return off;
}
#define __my_cpu_offset __my_cpu_offset()
#else
#define set_my_cpu_offset(x) do {} while(0)
#endif /* CONFIG_SMP */
#include <asm-generic/percpu.h>
#endif /* _ASM_ARM_PERCPU_H_ */