Contributors: 4
Author Tokens Token Proportion Commits Commit Proportion
Vladimir Oltean 216 67.50% 12 66.67%
Xiaoliang Yang 56 17.50% 2 11.11%
Colin Foster 45 14.06% 3 16.67%
Claudiu Manoil 3 0.94% 1 5.56%
Total 320 18 


/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright 2019 NXP
 */
#ifndef _MSCC_FELIX_H
#define _MSCC_FELIX_H

#define ocelot_to_felix(o)		container_of((o), struct felix, ocelot)
#define FELIX_MAC_QUIRKS		OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION

#define OCELOT_PORT_MODE_INTERNAL	BIT(0)
#define OCELOT_PORT_MODE_SGMII		BIT(1)
#define OCELOT_PORT_MODE_QSGMII		BIT(2)
#define OCELOT_PORT_MODE_2500BASEX	BIT(3)
#define OCELOT_PORT_MODE_USXGMII	BIT(4)

/* Platform-specific information */
struct felix_info {
	const struct resource		*target_io_res;
	const struct resource		*port_io_res;
	const struct resource		*imdio_res;
	const struct reg_field		*regfields;
	const u32 *const		*map;
	const struct ocelot_ops		*ops;
	const u32			*port_modes;
	int				num_mact_rows;
	const struct ocelot_stat_layout	*stats_layout;
	unsigned int			num_stats;
	int				num_ports;
	int				num_tx_queues;
	struct vcap_props		*vcap;
	u16				vcap_pol_base;
	u16				vcap_pol_max;
	u16				vcap_pol_base2;
	u16				vcap_pol_max2;
	const struct ptp_clock_info	*ptp_caps;

	/* Some Ocelot switches are integrated into the SoC without the
	 * extraction IRQ line connected to the ARM GIC. By enabling this
	 * workaround, the few packets that are delivered to the CPU port
	 * module (currently only PTP) are copied not only to the hardware CPU
	 * port module, but also to the 802.1Q Ethernet CPU port, and polling
	 * the extraction registers is triggered once the DSA tagger sees a PTP
	 * frame. The Ethernet frame is only used as a notification: it is
	 * dropped, and the original frame is extracted over MMIO and annotated
	 * with the RX timestamp.
	 */
	bool				quirk_no_xtr_irq;

	int	(*mdio_bus_alloc)(struct ocelot *ocelot);
	void	(*mdio_bus_free)(struct ocelot *ocelot);
	void	(*phylink_validate)(struct ocelot *ocelot, int port,
				    unsigned long *supported,
				    struct phylink_link_state *state);
	int	(*port_setup_tc)(struct dsa_switch *ds, int port,
				 enum tc_setup_type type, void *type_data);
	void	(*port_sched_speed_set)(struct ocelot *ocelot, int port,
					u32 speed);
	struct regmap *(*init_regmap)(struct ocelot *ocelot,
				      struct resource *res);
};

extern const struct dsa_switch_ops felix_switch_ops;

/* DSA glue / front-end for struct ocelot */
struct felix {
	struct dsa_switch		*ds;
	const struct felix_info		*info;
	struct ocelot			ocelot;
	struct mii_bus			*imdio;
	struct phylink_pcs		**pcs;
	resource_size_t			switch_base;
	resource_size_t			imdio_base;
	enum dsa_tag_protocol		tag_proto;
	struct kthread_worker		*xmit_worker;
};

struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);
int felix_netdev_to_port(struct net_device *dev);

#endif