Contributors: 13
Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
Christoph Hellwig |
56 |
26.92% |
7 |
30.43% |
Robin Murphy |
53 |
25.48% |
3 |
13.04% |
Suravee Suthikulpanit |
33 |
15.87% |
1 |
4.35% |
Linus Torvalds |
24 |
11.54% |
1 |
4.35% |
Catalin Marinas |
20 |
9.62% |
3 |
13.04% |
Oleksandr Tyshchenko |
5 |
2.40% |
1 |
4.35% |
Jean-Philippe Brucker |
4 |
1.92% |
1 |
4.35% |
Masayoshi Mizuma |
4 |
1.92% |
1 |
4.35% |
JiSheng Zhang |
3 |
1.44% |
1 |
4.35% |
Stefano Stabellini |
2 |
0.96% |
1 |
4.35% |
Laura Abbott |
2 |
0.96% |
1 |
4.35% |
Thomas Gleixner |
1 |
0.48% |
1 |
4.35% |
Geert Uytterhoeven |
1 |
0.48% |
1 |
4.35% |
Total |
208 |
|
23 |
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 ARM Ltd.
* Author: Catalin Marinas <catalin.marinas@arm.com>
*/
#include <linux/gfp.h>
#include <linux/cache.h>
#include <linux/dma-map-ops.h>
#include <linux/dma-iommu.h>
#include <xen/xen.h>
#include <asm/cacheflush.h>
#include <asm/xen/xen-ops.h>
void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
enum dma_data_direction dir)
{
__dma_map_area(phys_to_virt(paddr), size, dir);
}
void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
enum dma_data_direction dir)
{
__dma_unmap_area(phys_to_virt(paddr), size, dir);
}
void arch_dma_prep_coherent(struct page *page, size_t size)
{
__dma_flush_area(page_address(page), size);
}
#ifdef CONFIG_IOMMU_DMA
void arch_teardown_dma_ops(struct device *dev)
{
dev->dma_ops = NULL;
}
#endif
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
const struct iommu_ops *iommu, bool coherent)
{
int cls = cache_line_size_of_cpu();
WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN,
TAINT_CPU_OUT_OF_SPEC,
"%s %s: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
dev_driver_string(dev), dev_name(dev),
ARCH_DMA_MINALIGN, cls);
dev->dma_coherent = coherent;
if (iommu)
iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
xen_setup_dma_ops(dev);
}