Contributors: 26
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Benjamin Herrenschmidt |
149 |
27.59% |
9 |
21.95% |
| Paul Mackerras |
47 |
8.70% |
2 |
4.88% |
| John Rose |
45 |
8.33% |
1 |
2.44% |
| Anton Blanchard |
44 |
8.15% |
2 |
4.88% |
| Bartlomiej Zolnierkiewicz |
42 |
7.78% |
1 |
2.44% |
| Alexey Kardashevskiy |
38 |
7.04% |
2 |
4.88% |
| Alistair Popple |
27 |
5.00% |
1 |
2.44% |
| Grant C. Likely |
20 |
3.70% |
1 |
2.44% |
| Becky Bruce |
18 |
3.33% |
1 |
2.44% |
| Daniel Axtens |
16 |
2.96% |
1 |
2.44% |
| David Woodhouse |
15 |
2.78% |
3 |
7.32% |
| Bryant G. Ly |
12 |
2.22% |
1 |
2.44% |
| Linas Vepstas |
10 |
1.85% |
1 |
2.44% |
| Björn Helgaas |
10 |
1.85% |
1 |
2.44% |
| Nathan Fontenot |
9 |
1.67% |
1 |
2.44% |
| Kumar Gala |
9 |
1.67% |
1 |
2.44% |
| Stephen Rothwell |
9 |
1.67% |
2 |
4.88% |
| Andrew Morton |
6 |
1.11% |
2 |
4.88% |
| Michael Ellerman |
5 |
0.93% |
1 |
2.44% |
| Thomas Gleixner |
2 |
0.37% |
1 |
2.44% |
| Christoph Hellwig |
2 |
0.37% |
1 |
2.44% |
| Josh Boyer |
1 |
0.19% |
1 |
2.44% |
| FUJITA Tomonori |
1 |
0.19% |
1 |
2.44% |
| Bart Van Assche |
1 |
0.19% |
1 |
2.44% |
| Rob Herring |
1 |
0.19% |
1 |
2.44% |
| Roland Dreier |
1 |
0.19% |
1 |
2.44% |
| Total |
540 |
|
41 |
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef __ASM_POWERPC_PCI_H
#define __ASM_POWERPC_PCI_H
#ifdef __KERNEL__
/*
*/
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/dma-mapping.h>
#include <linux/scatterlist.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/pci-bridge.h>
/* Return values for pci_controller_ops.probe_mode function */
#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x10000000
/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
#define IOBASE_BRIDGE_NUMBER 0
#define IOBASE_MEMORY 1
#define IOBASE_IO 2
#define IOBASE_ISA_IO 3
#define IOBASE_ISA_MEM 4
/*
* Set this to 1 if you want the kernel to re-assign all PCI
* bus numbers (don't do that on ppc64 yet !)
*/
#define pcibios_assign_all_busses() \
(pci_has_flag(PCI_REASSIGN_ALL_BUS))
#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
if (ppc_md.pci_get_legacy_ide_irq)
return ppc_md.pci_get_legacy_ide_irq(dev, channel);
return channel ? 15 : 14;
}
#ifdef CONFIG_PCI
extern void set_pci_dma_ops(const struct dma_map_ops *dma_ops);
#else /* CONFIG_PCI */
#define set_pci_dma_ops(d)
#endif
#ifdef CONFIG_PPC64
/*
* We want to avoid touching the cacheline size or MWI bit.
* pSeries firmware sets the cacheline size (which is not the cpu cacheline
* size in all cases) and hardware treats MWI the same as memory write.
*/
#define PCI_DISABLE_MWI
#endif /* CONFIG_PPC64 */
extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
struct vm_area_struct;
/* Tell PCI code what kind of PCI resource mappings we support */
#define HAVE_PCI_MMAP 1
#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
#define arch_can_pci_mmap_io() 1
#define arch_can_pci_mmap_wc() 1
extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
size_t count);
extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
size_t count);
extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state);
#define HAVE_PCI_LEGACY 1
extern void pcibios_claim_one_bus(struct pci_bus *b);
extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
extern void pcibios_resource_survey(void);
extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
extern int remove_phb_dynamic(struct pci_controller *phb);
extern struct pci_dev *of_create_pci_dev(struct device_node *node,
struct pci_bus *bus, int devfn);
extern unsigned int pci_parse_of_flags(u32 addr0, int bridge);
extern void of_scan_pci_bridge(struct pci_dev *dev);
extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
struct file;
extern pgprot_t pci_phys_mem_access_prot(struct file *file,
unsigned long pfn,
unsigned long size,
pgprot_t prot);
#define HAVE_ARCH_PCI_RESOURCE_TO_USER
extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
extern void pcibios_setup_bus_devices(struct pci_bus *bus);
extern void pcibios_setup_bus_self(struct pci_bus *bus);
extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
extern void pcibios_scan_phb(struct pci_controller *hose);
#endif /* __KERNEL__ */
extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev);
extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index);
extern int pnv_npu2_init(struct pci_controller *hose);
extern int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid,
unsigned long msr);
extern int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev);
#endif /* __ASM_POWERPC_PCI_H */