/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2019, Intel Corporation. */ #ifndef _ICE_NVM_H_ #define _ICE_NVM_H_ enum ice_status ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access); void ice_release_nvm(struct ice_hw *hw); enum ice_status ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data, bool read_shadow_ram); enum ice_status ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size); enum ice_status ice_init_nvm(struct ice_hw *hw); #endif /* _ICE_NVM_H_ */