Author | Tokens | Token Proportion | Commits | Commit Proportion |
---|---|---|---|---|
Oded Gabbay | 156 | 100.00% | 1 | 100.00% |
Total | 156 | 1 |
/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2020 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_ARC_FARM_KDMA_CTX_REGS_H_ #define ASIC_REG_ARC_FARM_KDMA_CTX_REGS_H_ /* ***************************************** * ARC_FARM_KDMA_CTX * (Prototype: DMA_CORE_CTX) ***************************************** */ #define mmARC_FARM_KDMA_CTX_RATE_LIM_TKN 0x4E8B860 #define mmARC_FARM_KDMA_CTX_PWRLP 0x4E8B864 #define mmARC_FARM_KDMA_CTX_TE_NUMROWS 0x4E8B868 #define mmARC_FARM_KDMA_CTX_IDX 0x4E8B86C #define mmARC_FARM_KDMA_CTX_IDX_INC 0x4E8B870 #define mmARC_FARM_KDMA_CTX_CTRL 0x4E8B874 #define mmARC_FARM_KDMA_CTX_SRC_TSIZE_0 0x4E8B878 #define mmARC_FARM_KDMA_CTX_SRC_TSIZE_1 0x4E8B87C #define mmARC_FARM_KDMA_CTX_SRC_STRIDE_1 0x4E8B880 #define mmARC_FARM_KDMA_CTX_SRC_TSIZE_2 0x4E8B884 #define mmARC_FARM_KDMA_CTX_SRC_STRIDE_2 0x4E8B888 #define mmARC_FARM_KDMA_CTX_SRC_TSIZE_3 0x4E8B88C #define mmARC_FARM_KDMA_CTX_SRC_STRIDE_3 0x4E8B890 #define mmARC_FARM_KDMA_CTX_SRC_TSIZE_4 0x4E8B894 #define mmARC_FARM_KDMA_CTX_SRC_STRIDE_4 0x4E8B898 #define mmARC_FARM_KDMA_CTX_DST_TSIZE_1 0x4E8B89C #define mmARC_FARM_KDMA_CTX_DST_STRIDE_1 0x4E8B8A0 #define mmARC_FARM_KDMA_CTX_DST_TSIZE_2 0x4E8B8A4 #define mmARC_FARM_KDMA_CTX_DST_STRIDE_2 0x4E8B8A8 #define mmARC_FARM_KDMA_CTX_DST_TSIZE_3 0x4E8B8AC #define mmARC_FARM_KDMA_CTX_DST_STRIDE_3 0x4E8B8B0 #define mmARC_FARM_KDMA_CTX_DST_TSIZE_4 0x4E8B8B4 #define mmARC_FARM_KDMA_CTX_DST_STRIDE_4 0x4E8B8B8 #define mmARC_FARM_KDMA_CTX_WR_COMP_ADDR_HI 0x4E8B8BC #define mmARC_FARM_KDMA_CTX_WR_COMP_ADDR_LO 0x4E8B8C0 #define mmARC_FARM_KDMA_CTX_WR_COMP_WDATA 0x4E8B8C4 #define mmARC_FARM_KDMA_CTX_SRC_OFFSET_LO 0x4E8B8C8 #define mmARC_FARM_KDMA_CTX_SRC_OFFSET_HI 0x4E8B8CC #define mmARC_FARM_KDMA_CTX_DST_OFFSET_LO 0x4E8B8D0 #define mmARC_FARM_KDMA_CTX_DST_OFFSET_HI 0x4E8B8D4 #define mmARC_FARM_KDMA_CTX_SRC_BASE_LO 0x4E8B8D8 #define mmARC_FARM_KDMA_CTX_SRC_BASE_HI 0x4E8B8DC #define mmARC_FARM_KDMA_CTX_DST_BASE_LO 0x4E8B8E0 #define mmARC_FARM_KDMA_CTX_DST_BASE_HI 0x4E8B8E4 #define mmARC_FARM_KDMA_CTX_DST_TSIZE_0 0x4E8B8E8 #define mmARC_FARM_KDMA_CTX_COMMIT 0x4E8B8EC #endif /* ASIC_REG_ARC_FARM_KDMA_CTX_REGS_H_ */
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