Contributors: 12
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Matt Roper |
81 |
55.86% |
3 |
13.04% |
| Ville Syrjälä |
19 |
13.10% |
3 |
13.04% |
| Jani Nikula |
13 |
8.97% |
5 |
21.74% |
| Eugeni Dodonov |
13 |
8.97% |
2 |
8.70% |
| Mika Kuoppala |
6 |
4.14% |
2 |
8.70% |
| Paulo Zanoni |
4 |
2.76% |
1 |
4.35% |
| Chris Wilson |
3 |
2.07% |
2 |
8.70% |
| Matt Atwood |
2 |
1.38% |
1 |
4.35% |
| Andrzej Hajda |
1 |
0.69% |
1 |
4.35% |
| Lucas De Marchi |
1 |
0.69% |
1 |
4.35% |
| Maarten Lankhorst |
1 |
0.69% |
1 |
4.35% |
| Oscar Mateo |
1 |
0.69% |
1 |
4.35% |
| Total |
145 |
|
23 |
|
// SPDX-License-Identifier: MIT
/*
* Copyright © 2023 Intel Corporation
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_wa.h"
static void gen11_display_wa_apply(struct drm_i915_private *i915)
{
/* Wa_14010594013 */
intel_de_rmw(i915, GEN8_CHICKEN_DCPR_1, 0, ICL_DELAY_PMRSP);
}
static void xe_d_display_wa_apply(struct drm_i915_private *i915)
{
/* Wa_14013723622 */
intel_de_rmw(i915, CLKREQ_POLICY, CLKREQ_POLICY_MEM_UP_OVRD, 0);
}
static void adlp_display_wa_apply(struct drm_i915_private *i915)
{
/* Wa_22011091694:adlp */
intel_de_rmw(i915, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS);
/* Bspec/49189 Initialize Sequence */
intel_de_rmw(i915, GEN8_CHICKEN_DCPR_1, DDI_CLOCK_REG_ACCESS, 0);
}
void intel_display_wa_apply(struct drm_i915_private *i915)
{
if (IS_ALDERLAKE_P(i915))
adlp_display_wa_apply(i915);
else if (DISPLAY_VER(i915) == 12)
xe_d_display_wa_apply(i915);
else if (DISPLAY_VER(i915) == 11)
gen11_display_wa_apply(i915);
}