Contributors: 22
Author Tokens Token Proportion Commits Commit Proportion
Dave Hansen 172 41.45% 7 17.07%
Peter Zijlstra 27 6.51% 2 4.88%
Rick Edgecombe 26 6.27% 2 4.88%
Thomas Gleixner 25 6.02% 3 7.32%
Fenghua Yu 24 5.78% 2 4.88%
Kirill A. Shutemov 24 5.78% 3 7.32%
Sean Christopherson 17 4.10% 2 4.88%
Kuppuswamy Sathyanarayanan 14 3.37% 1 2.44%
H. Peter Anvin 14 3.37% 2 4.88%
Juergen Gross 13 3.13% 1 2.44%
Michael Roth 11 2.65% 1 2.44%
Ricardo Neri 11 2.65% 1 2.44%
Andrew Lutomirski 10 2.41% 1 2.44%
Sandipan Das 5 1.20% 1 2.44%
Brijesh Singh 5 1.20% 1 2.44%
Breno Leitão 5 1.20% 5 12.20%
Kim Phillips 4 0.96% 1 2.44%
David Woodhouse 3 0.72% 1 2.44%
Andi Kleen 2 0.48% 1 2.44%
Borislav Petkov 1 0.24% 1 2.44%
Yinghai Lu 1 0.24% 1 2.44%
Babu Moger 1 0.24% 1 2.44%
Total 415 41 


#ifndef _ASM_X86_DISABLED_FEATURES_H
#define _ASM_X86_DISABLED_FEATURES_H

/* These features, although they might be available in a CPU
 * will not be used because the compile options to support
 * them are not present.
 *
 * This code allows them to be checked and disabled at
 * compile time without an explicit #ifdef.  Use
 * cpu_feature_enabled().
 */

#ifdef CONFIG_X86_UMIP
# define DISABLE_UMIP	0
#else
# define DISABLE_UMIP	(1<<(X86_FEATURE_UMIP & 31))
#endif

#ifdef CONFIG_X86_64
# define DISABLE_VME		(1<<(X86_FEATURE_VME & 31))
# define DISABLE_K6_MTRR	(1<<(X86_FEATURE_K6_MTRR & 31))
# define DISABLE_CYRIX_ARR	(1<<(X86_FEATURE_CYRIX_ARR & 31))
# define DISABLE_CENTAUR_MCR	(1<<(X86_FEATURE_CENTAUR_MCR & 31))
# define DISABLE_PCID		0
#else
# define DISABLE_VME		0
# define DISABLE_K6_MTRR	0
# define DISABLE_CYRIX_ARR	0
# define DISABLE_CENTAUR_MCR	0
# define DISABLE_PCID		(1<<(X86_FEATURE_PCID & 31))
#endif /* CONFIG_X86_64 */

#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
# define DISABLE_PKU		0
# define DISABLE_OSPKE		0
#else
# define DISABLE_PKU		(1<<(X86_FEATURE_PKU & 31))
# define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE & 31))
#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */

#ifdef CONFIG_X86_5LEVEL
# define DISABLE_LA57	0
#else
# define DISABLE_LA57	(1<<(X86_FEATURE_LA57 & 31))
#endif

#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
# define DISABLE_PTI		0
#else
# define DISABLE_PTI		(1 << (X86_FEATURE_PTI & 31))
#endif

#ifdef CONFIG_MITIGATION_RETPOLINE
# define DISABLE_RETPOLINE	0
#else
# define DISABLE_RETPOLINE	((1 << (X86_FEATURE_RETPOLINE & 31)) | \
				 (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
#endif

#ifdef CONFIG_MITIGATION_RETHUNK
# define DISABLE_RETHUNK	0
#else
# define DISABLE_RETHUNK	(1 << (X86_FEATURE_RETHUNK & 31))
#endif

#ifdef CONFIG_MITIGATION_UNRET_ENTRY
# define DISABLE_UNRET		0
#else
# define DISABLE_UNRET		(1 << (X86_FEATURE_UNRET & 31))
#endif

#ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
# define DISABLE_CALL_DEPTH_TRACKING	0
#else
# define DISABLE_CALL_DEPTH_TRACKING	(1 << (X86_FEATURE_CALL_DEPTH & 31))
#endif

#ifdef CONFIG_ADDRESS_MASKING
# define DISABLE_LAM		0
#else
# define DISABLE_LAM		(1 << (X86_FEATURE_LAM & 31))
#endif

#ifdef CONFIG_INTEL_IOMMU_SVM
# define DISABLE_ENQCMD		0
#else
# define DISABLE_ENQCMD		(1 << (X86_FEATURE_ENQCMD & 31))
#endif

#ifdef CONFIG_X86_SGX
# define DISABLE_SGX	0
#else
# define DISABLE_SGX	(1 << (X86_FEATURE_SGX & 31))
#endif

#ifdef CONFIG_XEN_PV
# define DISABLE_XENPV		0
#else
# define DISABLE_XENPV		(1 << (X86_FEATURE_XENPV & 31))
#endif

#ifdef CONFIG_INTEL_TDX_GUEST
# define DISABLE_TDX_GUEST	0
#else
# define DISABLE_TDX_GUEST	(1 << (X86_FEATURE_TDX_GUEST & 31))
#endif

#ifdef CONFIG_X86_USER_SHADOW_STACK
#define DISABLE_USER_SHSTK	0
#else
#define DISABLE_USER_SHSTK	(1 << (X86_FEATURE_USER_SHSTK & 31))
#endif

#ifdef CONFIG_X86_KERNEL_IBT
#define DISABLE_IBT	0
#else
#define DISABLE_IBT	(1 << (X86_FEATURE_IBT & 31))
#endif

#ifdef CONFIG_X86_FRED
# define DISABLE_FRED	0
#else
# define DISABLE_FRED	(1 << (X86_FEATURE_FRED & 31))
#endif

#ifdef CONFIG_KVM_AMD_SEV
#define DISABLE_SEV_SNP		0
#else
#define DISABLE_SEV_SNP		(1 << (X86_FEATURE_SEV_SNP & 31))
#endif

/*
 * Make sure to add features to the correct mask
 */
#define DISABLED_MASK0	(DISABLE_VME)
#define DISABLED_MASK1	0
#define DISABLED_MASK2	0
#define DISABLED_MASK3	(DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
#define DISABLED_MASK4	(DISABLE_PCID)
#define DISABLED_MASK5	0
#define DISABLED_MASK6	0
#define DISABLED_MASK7	(DISABLE_PTI)
#define DISABLED_MASK8	(DISABLE_XENPV|DISABLE_TDX_GUEST)
#define DISABLED_MASK9	(DISABLE_SGX)
#define DISABLED_MASK10	0
#define DISABLED_MASK11	(DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
			 DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
#define DISABLED_MASK12	(DISABLE_FRED|DISABLE_LAM)
#define DISABLED_MASK13	0
#define DISABLED_MASK14	0
#define DISABLED_MASK15	0
#define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
			 DISABLE_ENQCMD)
#define DISABLED_MASK17	0
#define DISABLED_MASK18	(DISABLE_IBT)
#define DISABLED_MASK19	(DISABLE_SEV_SNP)
#define DISABLED_MASK20	0
#define DISABLED_MASK21	0
#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)

#endif /* _ASM_X86_DISABLED_FEATURES_H */