Author | Tokens | Token Proportion | Commits | Commit Proportion |
---|---|---|---|---|
Ben Skeggs | 649 | 99.69% | 33 | 94.29% |
Tom Rix | 1 | 0.15% | 1 | 2.86% |
Maarten Lankhorst | 1 | 0.15% | 1 | 2.86% |
Total | 651 | 35 |
/* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs <bskeggs@redhat.com> */ #include "gf100.h" #include "ctxgf100.h" #include <nvif/class.h> /******************************************************************************* * PGRAPH register lists ******************************************************************************/ const struct gf100_gr_init gf108_gr_init_gpc_unk_0[] = { { 0x418604, 1, 0x04, 0x00000000 }, { 0x418680, 1, 0x04, 0x00000000 }, { 0x418714, 1, 0x04, 0x00000000 }, { 0x418384, 1, 0x04, 0x00000000 }, {} }; const struct gf100_gr_init gf108_gr_init_setup_1[] = { { 0x4188c8, 2, 0x04, 0x00000000 }, { 0x4188d0, 1, 0x04, 0x00010000 }, { 0x4188d4, 1, 0x04, 0x00000001 }, {} }; static const struct gf100_gr_init gf108_gr_init_gpc_unk_1[] = { { 0x418d00, 1, 0x04, 0x00000000 }, { 0x418f08, 1, 0x04, 0x00000000 }, { 0x418e00, 1, 0x04, 0x00000003 }, { 0x418e08, 1, 0x04, 0x00000000 }, {} }; static const struct gf100_gr_init gf108_gr_init_pe_0[] = { { 0x41980c, 1, 0x04, 0x00000010 }, { 0x419810, 1, 0x04, 0x00000000 }, { 0x419814, 1, 0x04, 0x00000004 }, { 0x419844, 1, 0x04, 0x00000000 }, { 0x41984c, 1, 0x04, 0x00005bc5 }, { 0x419850, 4, 0x04, 0x00000000 }, { 0x419880, 1, 0x04, 0x00000002 }, {} }; static const struct gf100_gr_pack gf108_gr_pack_mmio[] = { { gf100_gr_init_main_0 }, { gf100_gr_init_fe_0 }, { gf100_gr_init_pri_0 }, { gf100_gr_init_rstr2d_0 }, { gf100_gr_init_pd_0 }, { gf104_gr_init_ds_0 }, { gf100_gr_init_scc_0 }, { gf100_gr_init_prop_0 }, { gf108_gr_init_gpc_unk_0 }, { gf100_gr_init_setup_0 }, { gf100_gr_init_crstr_0 }, { gf108_gr_init_setup_1 }, { gf100_gr_init_zcull_0 }, { gf100_gr_init_gpm_0 }, { gf108_gr_init_gpc_unk_1 }, { gf100_gr_init_gcc_0 }, { gf100_gr_init_tpccs_0 }, { gf104_gr_init_tex_0 }, { gf108_gr_init_pe_0 }, { gf100_gr_init_l1c_0 }, { gf100_gr_init_wwdx_0 }, { gf100_gr_init_tpccs_1 }, { gf100_gr_init_mpc_0 }, { gf104_gr_init_sm_0 }, { gf100_gr_init_be_0 }, { gf100_gr_init_fe_1 }, {} }; /******************************************************************************* * PGRAPH engine/subdev functions ******************************************************************************/ static void gf108_gr_init_r405a14(struct gf100_gr *gr) { nvkm_wr32(gr->base.engine.subdev.device, 0x405a14, 0x80000000); } static const struct gf100_gr_func gf108_gr = { .oneinit_tiles = gf100_gr_oneinit_tiles, .oneinit_sm_id = gf100_gr_oneinit_sm_id, .init = gf100_gr_init, .init_gpc_mmu = gf100_gr_init_gpc_mmu, .init_r405a14 = gf108_gr_init_r405a14, .init_vsc_stream_master = gf100_gr_init_vsc_stream_master, .init_zcull = gf100_gr_init_zcull, .init_num_active_ltcs = gf100_gr_init_num_active_ltcs, .init_fecs_exceptions = gf100_gr_init_fecs_exceptions, .init_40601c = gf100_gr_init_40601c, .init_419cc0 = gf100_gr_init_419cc0, .init_419eb4 = gf100_gr_init_419eb4, .init_tex_hww_esr = gf100_gr_init_tex_hww_esr, .init_shader_exceptions = gf100_gr_init_shader_exceptions, .init_rop_exceptions = gf100_gr_init_rop_exceptions, .init_exception2 = gf100_gr_init_exception2, .init_400054 = gf100_gr_init_400054, .trap_mp = gf100_gr_trap_mp, .mmio = gf108_gr_pack_mmio, .fecs.ucode = &gf100_gr_fecs_ucode, .fecs.reset = gf100_gr_fecs_reset, .gpccs.ucode = &gf100_gr_gpccs_ucode, .rops = gf100_gr_rops, .grctx = &gf108_grctx, .zbc = &gf100_gr_zbc, .sclass = { { -1, -1, FERMI_TWOD_A }, { -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A }, { -1, -1, FERMI_A, &gf100_fermi }, { -1, -1, FERMI_B, &gf100_fermi }, { -1, -1, FERMI_COMPUTE_A }, {} } }; static const struct gf100_gr_fwif gf108_gr_fwif[] = { { -1, gf100_gr_load, &gf108_gr }, { -1, gf100_gr_nofw, &gf108_gr }, {} }; int gf108_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr) { return gf100_gr_new_(gf108_gr_fwif, device, type, inst, pgr); }
Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.
Created with Cregit http://github.com/cregit/cregit
Version 2.0-RC1