Contributors: 19
Author Tokens Token Proportion Commits Commit Proportion
Oliver Neukum 149 42.82% 14 28.57%
Linus Torvalds (pre-git) 51 14.66% 10 20.41%
David Kubicek 47 13.51% 1 2.04%
Johan Hovold 34 9.77% 7 14.29%
Ladislav Michl 18 5.17% 2 4.08%
Tobias Herzog 13 3.74% 1 2.04%
David Brownell 10 2.87% 2 4.08%
Alan Cox 5 1.44% 1 2.04%
Lu Baolu 3 0.86% 1 2.04%
Havard Skinnemoen 3 0.86% 1 2.04%
Macpaul Lin 3 0.86% 1 2.04%
Dmitry Torokhov 3 0.86% 1 2.04%
Alexey Sokolov 3 0.86% 1 2.04%
David Engraf 1 0.29% 1 2.04%
Jerome Brunet 1 0.29% 1 2.04%
Lucas De Marchi 1 0.29% 1 2.04%
Randy Dunlap 1 0.29% 1 2.04%
Steven Cole 1 0.29% 1 2.04%
Greg Kroah-Hartman 1 0.29% 1 2.04%
Total 348 49 


/* SPDX-License-Identifier: GPL-2.0 */
/*
 *
 * Includes for cdc-acm.c
 *
 * Mainly take from usbnet's cdc-ether part
 *
 */

/*
 * Major and minor numbers.
 */

#define ACM_TTY_MAJOR		166
#define ACM_TTY_MINORS		256

#define ACM_MINOR_INVALID	ACM_TTY_MINORS

/*
 * Requests.
 */

#define USB_RT_ACM		(USB_TYPE_CLASS | USB_RECIP_INTERFACE)

/*
 * Internal driver structures.
 */

/*
 * The only reason to have several buffers is to accommodate assumptions
 * in line disciplines. They ask for empty space amount, receive our URB size,
 * and proceed to issue several 1-character writes, assuming they will fit.
 * The very first write takes a complete URB. Fortunately, this only happens
 * when processing onlcr, so we only need 2 buffers. These values must be
 * powers of 2.
 */
#define ACM_NW  16
#define ACM_NR  16

struct acm_wb {
	u8 *buf;
	dma_addr_t dmah;
	unsigned int len;
	struct urb		*urb;
	struct acm		*instance;
	bool use;
};

struct acm_rb {
	int			size;
	unsigned char		*base;
	dma_addr_t		dma;
	int			index;
	struct acm		*instance;
};

struct acm {
	struct usb_device *dev;				/* the corresponding usb device */
	struct usb_interface *control;			/* control interface */
	struct usb_interface *data;			/* data interface */
	unsigned in, out;				/* i/o pipes */
	struct tty_port port;			 	/* our tty port data */
	struct urb *ctrlurb;				/* urbs */
	u8 *ctrl_buffer;				/* buffers of urbs */
	dma_addr_t ctrl_dma;				/* dma handles of buffers */
	u8 *country_codes;				/* country codes from device */
	unsigned int country_code_size;			/* size of this buffer */
	unsigned int country_rel_date;			/* release date of version */
	struct acm_wb wb[ACM_NW];
	unsigned long read_urbs_free;
	struct urb *read_urbs[ACM_NR];
	struct acm_rb read_buffers[ACM_NR];
	int rx_buflimit;
	spinlock_t read_lock;
	u8 *notification_buffer;			/* to reassemble fragmented notifications */
	unsigned int nb_index;
	unsigned int nb_size;
	int transmitting;
	spinlock_t write_lock;
	struct mutex mutex;
	bool disconnected;
	unsigned long flags;
#		define EVENT_TTY_WAKEUP	0
#		define EVENT_RX_STALL	1
#		define ACM_THROTTLED	2
#		define ACM_ERROR_DELAY	3
	unsigned long urbs_in_error_delay;		/* these need to be restarted after a delay */
	struct usb_cdc_line_coding line;		/* bits, stop, parity */
	struct delayed_work dwork;		        /* work queue entry for various purposes */
	unsigned int ctrlin;				/* input control lines (DCD, DSR, RI, break, overruns) */
	unsigned int ctrlout;				/* output control lines (DTR, RTS) */
	struct async_icount iocount;			/* counters for control line changes */
	struct async_icount oldcount;			/* for comparison of counter */
	wait_queue_head_t wioctl;			/* for ioctl */
	unsigned int writesize;				/* max packet size for the output bulk endpoint */
	unsigned int readsize,ctrlsize;			/* buffer sizes for freeing */
	unsigned int minor;				/* acm minor number */
	unsigned char clocal;				/* termios CLOCAL */
	unsigned int ctrl_caps;				/* control capabilities from the class specific header */
	unsigned int susp_count;			/* number of suspended interfaces */
	unsigned int combined_interfaces:1;		/* control and data collapsed */
	u8 bInterval;
	struct usb_anchor delayed;			/* writes queued for a device about to be woken */
	unsigned long quirks;
};

/* constants describing various quirks and errors */
#define NO_UNION_NORMAL			BIT(0)
#define SINGLE_RX_URB			BIT(1)
#define NO_CAP_LINE			BIT(2)
#define IGNORE_DEVICE			BIT(3)
#define QUIRK_CONTROL_LINE_STATE	BIT(4)
#define CLEAR_HALT_CONDITIONS		BIT(5)
#define SEND_ZERO_PACKET		BIT(6)
#define DISABLE_ECHO			BIT(7)