/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* * Copyright (c) 2020 MediaTek Inc. * Copyright (c) 2024 Collabora Ltd. * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> */ #ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8195_H #define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8195_H #define SLAVE_DDR_EMI 0 #define MASTER_MCUSYS 1 #define MASTER_GPUSYS 2 #define MASTER_MMSYS 3 #define MASTER_MM_VPU 4 #define MASTER_MM_DISP 5 #define MASTER_MM_VDEC 6 #define MASTER_MM_VENC 7 #define MASTER_MM_CAM 8 #define MASTER_MM_IMG 9 #define MASTER_MM_MDP 10 #define MASTER_VPUSYS 11 #define MASTER_VPU_0 12 #define MASTER_VPU_1 13 #define MASTER_MDLASYS 14 #define MASTER_MDLA_0 15 #define MASTER_UFS 16 #define MASTER_PCIE_0 17 #define MASTER_PCIE_1 18 #define MASTER_USB 19 #define MASTER_DBGIF 20 #define SLAVE_HRT_DDR_EMI 21 #define MASTER_HRT_MMSYS 22 #define MASTER_HRT_MM_DISP 23 #define MASTER_HRT_MM_VDEC 24 #define MASTER_HRT_MM_VENC 25 #define MASTER_HRT_MM_CAM 26 #define MASTER_HRT_MM_IMG 27 #define MASTER_HRT_MM_MDP 28 #define MASTER_HRT_DBGIF 29 #define MASTER_WIFI 30 #define MASTER_BT 31 #define MASTER_NETSYS 32 #endif