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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ #ifndef INTERCONNECT_QCOM_IPQ5332_H #define INTERCONNECT_QCOM_IPQ5332_H #define MASTER_SNOC_PCIE3_1_M 0 #define SLAVE_SNOC_PCIE3_1_M 1 #define MASTER_ANOC_PCIE3_1_S 2 #define SLAVE_ANOC_PCIE3_1_S 3 #define MASTER_SNOC_PCIE3_2_M 4 #define SLAVE_SNOC_PCIE3_2_M 5 #define MASTER_ANOC_PCIE3_2_S 6 #define SLAVE_ANOC_PCIE3_2_S 7 #define MASTER_SNOC_USB 8 #define SLAVE_SNOC_USB 9 #define MASTER_NSSNOC_NSSCC 10 #define SLAVE_NSSNOC_NSSCC 11 #define MASTER_NSSNOC_SNOC_0 12 #define SLAVE_NSSNOC_SNOC_0 13 #define MASTER_NSSNOC_SNOC_1 14 #define SLAVE_NSSNOC_SNOC_1 15 #define MASTER_NSSNOC_ATB 16 #define SLAVE_NSSNOC_ATB 17 #define MASTER_NSSNOC_PCNOC_1 18 #define SLAVE_NSSNOC_PCNOC_1 19 #define MASTER_NSSNOC_QOSGEN_REF 20 #define SLAVE_NSSNOC_QOSGEN_REF 21 #define MASTER_NSSNOC_TIMEOUT_REF 22 #define SLAVE_NSSNOC_TIMEOUT_REF 23 #define MASTER_NSSNOC_XO_DCD 24 #define SLAVE_NSSNOC_XO_DCD 25 #define MASTER_NSSNOC_PPE 0 #define SLAVE_NSSNOC_PPE 1 #define MASTER_NSSNOC_PPE_CFG 2 #define SLAVE_NSSNOC_PPE_CFG 3 #define MASTER_NSSNOC_NSS_CSR 4 #define SLAVE_NSSNOC_NSS_CSR 5 #define MASTER_NSSNOC_CE_APB 6 #define SLAVE_NSSNOC_CE_APB 7 #define MASTER_NSSNOC_CE_AXI 8 #define SLAVE_NSSNOC_CE_AXI 9 #define MASTER_CNOC_AHB 0 #define SLAVE_CNOC_AHB 1 #endif /* INTERCONNECT_QCOM_IPQ5332_H */