Contributors: 15
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Ville Syrjälä |
256 |
34.97% |
2 |
6.25% |
| Jani Nikula |
127 |
17.35% |
13 |
40.62% |
| Jesse Barnes |
101 |
13.80% |
3 |
9.38% |
| Rodrigo Vivi |
80 |
10.93% |
3 |
9.38% |
| Dave Airlie |
80 |
10.93% |
1 |
3.12% |
| Ben Gamari |
33 |
4.51% |
1 |
3.12% |
| José Roberto de Souza |
16 |
2.19% |
1 |
3.12% |
| Lucas De Marchi |
12 |
1.64% |
1 |
3.12% |
| Daniel Vetter |
8 |
1.09% |
1 |
3.12% |
| Thomas Zimmermann |
8 |
1.09% |
1 |
3.12% |
| Yakui Zhao |
5 |
0.68% |
1 |
3.12% |
| Paulo Zanoni |
2 |
0.27% |
1 |
3.12% |
| Eugeni Dodonov |
2 |
0.27% |
1 |
3.12% |
| Chris Wilson |
1 |
0.14% |
1 |
3.12% |
| Keith Packard |
1 |
0.14% |
1 |
3.12% |
| Total |
732 |
|
32 |
|
// SPDX-License-Identifier: MIT
/*
* Copyright © 2024 Intel Corporation
*/
#include <drm/drm_device.h>
#include "i915_reg.h"
#include "i9xx_display_sr.h"
#include "i9xx_wm_regs.h"
#include "intel_de.h"
#include "intel_gmbus.h"
#include "intel_pci_config.h"
static void i9xx_display_save_swf(struct intel_display *display)
{
int i;
/* Scratch space */
if (DISPLAY_VER(display) == 2 && display->platform.mobile) {
for (i = 0; i < 7; i++) {
display->restore.saveSWF0[i] = intel_de_read(display, SWF0(display, i));
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i));
}
for (i = 0; i < 3; i++)
display->restore.saveSWF3[i] = intel_de_read(display, SWF3(display, i));
} else if (DISPLAY_VER(display) == 2) {
for (i = 0; i < 7; i++)
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i));
} else if (HAS_GMCH(display)) {
for (i = 0; i < 16; i++) {
display->restore.saveSWF0[i] = intel_de_read(display, SWF0(display, i));
display->restore.saveSWF1[i] = intel_de_read(display, SWF1(display, i));
}
for (i = 0; i < 3; i++)
display->restore.saveSWF3[i] = intel_de_read(display, SWF3(display, i));
}
}
static void i9xx_display_restore_swf(struct intel_display *display)
{
int i;
/* Scratch space */
if (DISPLAY_VER(display) == 2 && display->platform.mobile) {
for (i = 0; i < 7; i++) {
intel_de_write(display, SWF0(display, i), display->restore.saveSWF0[i]);
intel_de_write(display, SWF1(display, i), display->restore.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(display, SWF3(display, i), display->restore.saveSWF3[i]);
} else if (DISPLAY_VER(display) == 2) {
for (i = 0; i < 7; i++)
intel_de_write(display, SWF1(display, i), display->restore.saveSWF1[i]);
} else if (HAS_GMCH(display)) {
for (i = 0; i < 16; i++) {
intel_de_write(display, SWF0(display, i), display->restore.saveSWF0[i]);
intel_de_write(display, SWF1(display, i), display->restore.saveSWF1[i]);
}
for (i = 0; i < 3; i++)
intel_de_write(display, SWF3(display, i), display->restore.saveSWF3[i]);
}
}
void i9xx_display_sr_save(struct intel_display *display)
{
struct pci_dev *pdev = to_pci_dev(display->drm->dev);
if (!HAS_DISPLAY(display))
return;
/* Display arbitration control */
if (DISPLAY_VER(display) <= 4)
display->restore.saveDSPARB = intel_de_read(display, DSPARB(display));
if (DISPLAY_VER(display) == 4)
pci_read_config_word(pdev, GCDGMBUS, &display->restore.saveGCDGMBUS);
i9xx_display_save_swf(display);
}
void i9xx_display_sr_restore(struct intel_display *display)
{
struct pci_dev *pdev = to_pci_dev(display->drm->dev);
if (!HAS_DISPLAY(display))
return;
i9xx_display_restore_swf(display);
if (DISPLAY_VER(display) == 4)
pci_write_config_word(pdev, GCDGMBUS, display->restore.saveGCDGMBUS);
/* Display arbitration */
if (DISPLAY_VER(display) <= 4)
intel_de_write(display, DSPARB(display), display->restore.saveDSPARB);
}