Contributors: 15
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Jani Nikula |
113 |
40.36% |
8 |
21.05% |
| Ville Syrjälä |
43 |
15.36% |
8 |
21.05% |
| Andi Shyti |
41 |
14.64% |
1 |
2.63% |
| Ander Conselvan de Oliveira |
14 |
5.00% |
1 |
2.63% |
| Jesse Barnes |
11 |
3.93% |
2 |
5.26% |
| Imre Deak |
10 |
3.57% |
3 |
7.89% |
| Chris Wilson |
10 |
3.57% |
4 |
10.53% |
| Paulo Zanoni |
10 |
3.57% |
2 |
5.26% |
| Oscar Mateo |
8 |
2.86% |
2 |
5.26% |
| Daniel Vetter |
5 |
1.79% |
2 |
5.26% |
| Thomas Zimmermann |
4 |
1.43% |
1 |
2.63% |
| Rodrigo Vivi |
4 |
1.43% |
1 |
2.63% |
| Tvrtko A. Ursulin |
3 |
1.07% |
1 |
2.63% |
| Egbert Eich |
2 |
0.71% |
1 |
2.63% |
| Daniele Ceraolo Spurio |
2 |
0.71% |
1 |
2.63% |
| Total |
280 |
|
38 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __I915_IRQ_H__
#define __I915_IRQ_H__
#include <linux/ktime.h>
#include <linux/types.h>
#include "i915_reg_defs.h"
enum pipe;
struct drm_crtc;
struct drm_device;
struct drm_display_mode;
struct drm_i915_private;
struct intel_crtc;
struct intel_encoder;
struct intel_uncore;
void intel_irq_init(struct drm_i915_private *dev_priv);
void intel_irq_fini(struct drm_i915_private *dev_priv);
int intel_irq_install(struct drm_i915_private *dev_priv);
void intel_irq_uninstall(struct drm_i915_private *dev_priv);
void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);
void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, u32 mask);
void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv);
void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask);
void intel_irq_suspend(struct drm_i915_private *i915);
void intel_irq_resume(struct drm_i915_private *i915);
bool intel_irqs_enabled(struct drm_i915_private *dev_priv);
void intel_synchronize_irq(struct drm_i915_private *i915);
void intel_synchronize_hardirq(struct drm_i915_private *i915);
void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg);
void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs);
void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
u32 imr_val, u32 ier_val);
void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
u32 emr_val);
#endif /* __I915_IRQ_H__ */