Cregit: Linux 6.17: phy-qcom-qmp-pcs-pcie-v5

Contributors: 7
Author	Tokens	Token Proportion	Commits	Commit Proportion
Dmitry Eremin-Solenikov	37	55.22%	4	40.00%
Rohit Agarwal	10	14.93%	1	10.00%
Unknown	8	11.94%	1	10.00%
Mrinmay Sarkar	4	5.97%	1	10.00%
Manivannan Sadhasivam	4	5.97%	1	10.00%
Manu Gautam	3	4.48%	1	10.00%
Nishad Kamdar	1	1.49%	1	10.00%
Total	67		10

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_20_H_
#define QCOM_PHY_QMP_PCS_PCIE_V5_20_H_

/* Only for QMP V5_20 PHY - PCIe PCS registers */
#define QPHY_V5_20_PCS_PCIE_POWER_STATE_CONFIG2		0x00c
#define QPHY_V5_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE	0x01c
#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5	0x084
#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_ACTIONS		0x090
#define QPHY_V5_20_PCS_PCIE_EQ_CONFIG1			0x0a0
#define QPHY_V5_20_PCS_PCIE_PRESET_P10_POST		0x0e0
#define QPHY_PCIE_V5_20_PCS_G3_RXEQEVAL_TIME		0x0f0
#define QPHY_PCIE_V5_20_PCS_G4_RXEQEVAL_TIME		0x0f4
#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG2		0x0fc
#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG5		0x108
#define QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN			0x15c
#define QPHY_V5_20_PCS_PCIE_RX_MARGINING_CONFIG3	0x184

#define QPHY_V5_20_PCS_LANE1_INSIG_SW_CTRL2		0x024
#define QPHY_V5_20_PCS_LANE1_INSIG_MX_CTRL2		0x028

#endif

phy-qcom-qmp-pcs-pcie-v5_20.h