Contributors: 12
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Matthew Brost |
121 |
36.89% |
1 |
4.17% |
| Matt Roper |
70 |
21.34% |
4 |
16.67% |
| Michal Wajdeczko |
54 |
16.46% |
5 |
20.83% |
| Lucas De Marchi |
25 |
7.62% |
2 |
8.33% |
| Rodrigo Vivi |
20 |
6.10% |
4 |
16.67% |
| Ilia Levi |
16 |
4.88% |
2 |
8.33% |
| Jani Nikula |
9 |
2.74% |
1 |
4.17% |
| Gustavo Sousa |
6 |
1.83% |
1 |
4.17% |
| John Harrison |
4 |
1.22% |
1 |
4.17% |
| Michał Winiarski |
1 |
0.30% |
1 |
4.17% |
| Michael J. Ruhl |
1 |
0.30% |
1 |
4.17% |
| Matthew Auld |
1 |
0.30% |
1 |
4.17% |
| Total |
328 |
|
24 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2021-2023 Intel Corporation
*/
#ifndef _XE_MMIO_H_
#define _XE_MMIO_H_
#include "xe_gt_types.h"
struct xe_device;
struct xe_reg;
int xe_mmio_probe_early(struct xe_device *xe);
int xe_mmio_probe_tiles(struct xe_device *xe);
void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size);
u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);
bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);
u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
u32 timeout_us, u32 *out_val, bool atomic);
int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
u32 val, u32 timeout_us, u32 *out_val, bool atomic);
static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
{
if (addr < mmio->adj_limit)
addr += mmio->adj_offset;
return addr;
}
static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
{
return &xe->tiles[0].mmio;
}
#ifdef CONFIG_PCI_IOV
void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid);
#endif
#endif