Contributors: 18
Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
Jani Nikula |
76 |
25.94% |
3 |
7.14% |
Ville Syrjälä |
55 |
18.77% |
13 |
30.95% |
Ankit Nautiyal |
41 |
13.99% |
1 |
2.38% |
Maarten Lankhorst |
26 |
8.87% |
2 |
4.76% |
Eric Anholt |
17 |
5.80% |
1 |
2.38% |
Paulo Zanoni |
15 |
5.12% |
4 |
9.52% |
Shashank Sharma |
12 |
4.10% |
3 |
7.14% |
Daniel Vetter |
11 |
3.75% |
4 |
9.52% |
Jesse Barnes |
10 |
3.41% |
1 |
2.38% |
Chandra Konduru |
7 |
2.39% |
1 |
2.38% |
Zhenyu Wang |
6 |
2.05% |
1 |
2.38% |
Satheeshakrishna M |
4 |
1.37% |
1 |
2.38% |
Ramalingam C |
3 |
1.02% |
1 |
2.38% |
Ander Conselvan de Oliveira |
3 |
1.02% |
2 |
4.76% |
Clint Taylor |
2 |
0.68% |
1 |
2.38% |
Ma Ling |
2 |
0.68% |
1 |
2.38% |
Lucas De Marchi |
2 |
0.68% |
1 |
2.38% |
Stephen Chandler Paul |
1 |
0.34% |
1 |
2.38% |
Total |
293 |
|
42 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_HDMI_H__
#define __INTEL_HDMI_H__
#include <linux/types.h>
enum hdmi_infoframe_type;
enum port;
struct drm_connector;
struct drm_connector_state;
struct drm_encoder;
struct drm_i915_private;
struct intel_connector;
struct intel_crtc_state;
struct intel_digital_port;
struct intel_encoder;
struct intel_hdmi;
union hdmi_infoframe;
void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector);
int intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
void intel_hdmi_encoder_shutdown(struct intel_encoder *encoder);
bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
struct drm_connector *connector,
bool high_tmds_clock_ratio,
bool scrambling);
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
void intel_infoframe_init(struct intel_digital_port *dig_port);
u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
u32 intel_hdmi_infoframe_enable(unsigned int type);
void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
void intel_read_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
enum hdmi_infoframe_type type,
union hdmi_infoframe *frame);
bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int bpc, bool has_hdmi_sink, bool ycbcr420_output);
int intel_hdmi_tmds_clock(int clock, int bpc, bool ycbcr420_output);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
int num_slices, int output_format, bool hdmi_all_bpp,
int hdmi_max_chunk_bytes);
int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput);
int intel_hdmi_dsc_get_slice_height(int vactive);
#endif /* __INTEL_HDMI_H__ */