Contributors: 18
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| José Roberto de Souza |
85 |
26.40% |
9 |
18.75% |
| Jani Nikula |
70 |
21.74% |
2 |
4.17% |
| Rodrigo Vivi |
41 |
12.73% |
3 |
6.25% |
| Maarten Lankhorst |
29 |
9.01% |
6 |
12.50% |
| Ville Syrjälä |
19 |
5.90% |
6 |
12.50% |
| Gwan-gyeong Mun |
18 |
5.59% |
3 |
6.25% |
| Kumar, Mahesh |
11 |
3.42% |
4 |
8.33% |
| Jesse Barnes |
9 |
2.80% |
2 |
4.17% |
| Daniel Vetter |
8 |
2.48% |
1 |
2.08% |
| Dhinakaran Pandiyan |
7 |
2.17% |
2 |
4.17% |
| Manasi D Navare |
6 |
1.86% |
1 |
2.08% |
| Chris Wilson |
6 |
1.86% |
2 |
4.17% |
| Ander Conselvan de Oliveira |
4 |
1.24% |
2 |
4.17% |
| Michal Wajdeczko |
4 |
1.24% |
1 |
2.08% |
| Tomeu Vizoso |
2 |
0.62% |
1 |
2.08% |
| Matt Roper |
1 |
0.31% |
1 |
2.08% |
| Imre Deak |
1 |
0.31% |
1 |
2.08% |
| Shashank Sharma |
1 |
0.31% |
1 |
2.08% |
| Total |
322 |
|
48 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_PSR_H__
#define __INTEL_PSR_H__
#include <linux/types.h>
enum fb_op_origin;
struct drm_connector;
struct drm_connector_state;
struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dp;
struct intel_encoder;
struct intel_plane;
struct intel_plane_state;
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
void intel_psr_pre_plane_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_psr_post_plane_update(const struct intel_atomic_state *state);
void intel_psr_disable(struct intel_dp *intel_dp,
const struct intel_crtc_state *old_crtc_state);
int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);
void intel_psr_invalidate(struct drm_i915_private *dev_priv,
unsigned frontbuffer_bits,
enum fb_op_origin origin);
void intel_psr_flush(struct drm_i915_private *dev_priv,
unsigned frontbuffer_bits,
enum fb_op_origin origin);
void intel_psr_init(struct intel_dp *intel_dp);
void intel_psr_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
void intel_psr_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config);
void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir);
void intel_psr_short_pulse(struct intel_dp *intel_dp);
void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_state);
bool intel_psr_enabled(struct intel_dp *intel_dp);
int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state);
void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state,
int color_plane);
void intel_psr2_disable_plane_sel_fetch(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state);
void intel_psr_pause(struct intel_dp *intel_dp);
void intel_psr_resume(struct intel_dp *intel_dp);
void intel_psr_lock(const struct intel_crtc_state *crtc_state);
void intel_psr_unlock(const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_PSR_H__ */