Cregit: Linux 6.2: intel

Contributors: 8
Author	Tokens	Token Proportion	Commits	Commit Proportion
Tomas Winkler	71	69.61%	2	14.29%
Tvrtko A. Ursulin	11	10.78%	4	28.57%
Michal Wajdeczko	8	7.84%	2	14.29%
Jani Nikula	7	6.86%	2	14.29%
Casey Bowman	2	1.96%	1	7.14%
Dave Airlie	1	0.98%	1	7.14%
Chris Wilson	1	0.98%	1	7.14%
Daniele Ceraolo Spurio	1	0.98%	1	7.14%
Total	102		14

/* SPDX-License-Identifier: MIT */
/*
 * Copyright(c) 2019-2022, Intel Corporation. All rights reserved.
 */
#ifndef __INTEL_GSC_DEV_H__
#define __INTEL_GSC_DEV_H__

#include <linux/types.h>

struct drm_i915_private;
struct intel_gt;
struct mei_aux_device;

#define INTEL_GSC_NUM_INTERFACES 2
/*
 * The HECI1 bit corresponds to bit15 and HECI2 to bit14.
 * The reason for this is to allow growth for more interfaces in the future.
 */
#define GSC_IRQ_INTF(_x)  BIT(15 - (_x))

/**
 * struct intel_gsc - graphics security controller
 *
 * @gem_obj: scratch memory GSC operations
 * @intf : gsc interface
 */
struct intel_gsc {
	struct intel_gsc_intf {
		struct mei_aux_device *adev;
		struct drm_i915_gem_object *gem_obj;
		int irq;
		unsigned int id;
	} intf[INTEL_GSC_NUM_INTERFACES];
};

void intel_gsc_init(struct intel_gsc *gsc, struct drm_i915_private *dev_priv);
void intel_gsc_fini(struct intel_gsc *gsc);
void intel_gsc_irq_handler(struct intel_gt *gt, u32 iir);

#endif /* __INTEL_GSC_DEV_H__ */

intel_gsc.h