/* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include "priv.h" #include "regsnv04.h" static void nv41_timer_init(struct nvkm_timer *tmr) { struct nvkm_subdev *subdev = &tmr->subdev; struct nvkm_device *device = subdev->device; u32 f = device->crystal; u32 m = 1, n, d; /* aim for 31.25MHz, which gives us nanosecond timestamps */ d = 1000000 / 32; n = f; while (n < (d * 2)) { n += (n / m); m++; } /* reduce ratio to acceptable values */ while (((n % 5) == 0) && ((d % 5) == 0)) { n /= 5; d /= 5; } while (((n % 2) == 0) && ((d % 2) == 0)) { n /= 2; d /= 2; } while (n > 0xffff || d > 0xffff) { n >>= 1; d >>= 1; } nvkm_debug(subdev, "input frequency : %dHz\n", f); nvkm_debug(subdev, "input multiplier: %d\n", m); nvkm_debug(subdev, "numerator : %08x\n", n); nvkm_debug(subdev, "denominator : %08x\n", d); nvkm_debug(subdev, "timer frequency : %dHz\n", (f * m) * d / n); nvkm_wr32(device, 0x009220, m - 1); nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n); nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d); } static const struct nvkm_timer_func nv41_timer = { .init = nv41_timer_init, .intr = nv04_timer_intr, .read = nv04_timer_read, .time = nv04_timer_time, .alarm_init = nv04_timer_alarm_init, .alarm_fini = nv04_timer_alarm_fini, }; int nv41_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_timer **ptmr) { return nvkm_timer_new_(&nv41_timer, device, type, inst, ptmr); }