/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */ #ifndef _TXGBE_H_ #define _TXGBE_H_ #define TXGBE_MAX_FDIR_INDICES 63 #define TXGBE_MAX_RX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1) #define TXGBE_MAX_TX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1) #define TXGBE_SP_MAX_TX_QUEUES 128 #define TXGBE_SP_MAX_RX_QUEUES 128 #define TXGBE_SP_RAR_ENTRIES 128 #define TXGBE_SP_MC_TBL_SIZE 128 struct txgbe_mac_addr { u8 addr[ETH_ALEN]; u16 state; /* bitmask */ u64 pools; }; #define TXGBE_MAC_STATE_DEFAULT 0x1 #define TXGBE_MAC_STATE_MODIFIED 0x2 #define TXGBE_MAC_STATE_IN_USE 0x4 /* board specific private data structure */ struct txgbe_adapter { u8 __iomem *io_addr; /* Mainly for iounmap use */ /* OS defined structs */ struct net_device *netdev; struct pci_dev *pdev; /* structs defined in txgbe_type.h */ struct txgbe_hw hw; u16 msg_enable; struct txgbe_mac_addr *mac_table; char eeprom_id[32]; }; extern char txgbe_driver_name[]; #endif /* _TXGBE_H_ */