Contributors: 10
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Imre Deak |
36 |
22.09% |
6 |
26.09% |
| Jani Nikula |
30 |
18.40% |
6 |
26.09% |
| Rodrigo Vivi |
30 |
18.40% |
2 |
8.70% |
| Maarten Lankhorst |
21 |
12.88% |
1 |
4.35% |
| Ville Syrjälä |
13 |
7.98% |
3 |
13.04% |
| Ander Conselvan de Oliveira |
12 |
7.36% |
1 |
4.35% |
| Animesh Manna |
10 |
6.13% |
1 |
4.35% |
| Keith Packard |
8 |
4.91% |
1 |
4.35% |
| Jesse Barnes |
2 |
1.23% |
1 |
4.35% |
| Thomas Zimmermann |
1 |
0.61% |
1 |
4.35% |
| Total |
163 |
|
23 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_DP_LINK_TRAINING_H__
#define __INTEL_DP_LINK_TRAINING_H__
#include <drm/display/drm_dp_helper.h>
struct intel_crtc_state;
struct intel_dp;
int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy,
const u8 link_status[DP_LINK_STATUS_SIZE]);
void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy,
u8 dp_train_pat);
void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy);
void intel_dp_start_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_dp_stop_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void
intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
const u8 link_status[DP_LINK_STATUS_SIZE]);
/* Get the TPSx symbol type of the value programmed to DP_TRAINING_PATTERN_SET */
static inline u8 intel_dp_training_pattern_symbol(u8 pattern)
{
return pattern & ~DP_LINK_SCRAMBLING_DISABLE;
}
#endif /* __INTEL_DP_LINK_TRAINING_H__ */