Contributors: 1
Author Tokens Token Proportion Commits Commit Proportion
Rohit Agarwal 230 100.00% 1 100.00%
Total 230 1 


/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX65_H
#define __DRIVERS_INTERCONNECT_QCOM_SDX65_H

#define SDX65_MASTER_TCU_0		0
#define SDX65_MASTER_LLCC		1
#define SDX65_MASTER_AUDIO		2
#define SDX65_MASTER_BLSP_1		3
#define SDX65_MASTER_QDSS_BAM		4
#define SDX65_MASTER_QPIC		5
#define SDX65_MASTER_SNOC_CFG		6
#define SDX65_MASTER_SPMI_FETCHER	7
#define SDX65_MASTER_ANOC_SNOC		8
#define SDX65_MASTER_IPA		9
#define SDX65_MASTER_MEM_NOC_SNOC	10
#define SDX65_MASTER_MEM_NOC_PCIE_SNOC	11
#define SDX65_MASTER_SNOC_GC_MEM_NOC	12
#define SDX65_MASTER_CRYPTO		13
#define SDX65_MASTER_APPSS_PROC		14
#define SDX65_MASTER_IPA_PCIE		15
#define SDX65_MASTER_PCIE_0		16
#define SDX65_MASTER_QDSS_ETR		17
#define SDX65_MASTER_SDCC_1		18
#define SDX65_MASTER_USB3		19
#define SDX65_SLAVE_EBI1		512
#define SDX65_SLAVE_AOSS		513
#define SDX65_SLAVE_APPSS		514
#define SDX65_SLAVE_AUDIO		515
#define SDX65_SLAVE_BLSP_1		516
#define SDX65_SLAVE_CLK_CTL		517
#define SDX65_SLAVE_CRYPTO_0_CFG	518
#define SDX65_SLAVE_CNOC_DDRSS		519
#define SDX65_SLAVE_ECC_CFG		520
#define SDX65_SLAVE_IMEM_CFG		521
#define SDX65_SLAVE_IPA_CFG		522
#define SDX65_SLAVE_CNOC_MSS		523
#define SDX65_SLAVE_PCIE_PARF		524
#define SDX65_SLAVE_PDM			525
#define SDX65_SLAVE_PRNG		526
#define SDX65_SLAVE_QDSS_CFG		527
#define SDX65_SLAVE_QPIC		528
#define SDX65_SLAVE_SDCC_1		529
#define SDX65_SLAVE_SNOC_CFG		530
#define SDX65_SLAVE_SPMI_FETCHER	531
#define SDX65_SLAVE_SPMI_VGI_COEX	532
#define SDX65_SLAVE_TCSR		533
#define SDX65_SLAVE_TLMM		534
#define SDX65_SLAVE_USB3		535
#define SDX65_SLAVE_USB3_PHY_CFG	536
#define SDX65_SLAVE_ANOC_SNOC		537
#define SDX65_SLAVE_LLCC		538
#define SDX65_SLAVE_MEM_NOC_SNOC	539
#define SDX65_SLAVE_SNOC_MEM_NOC_GC	540
#define SDX65_SLAVE_MEM_NOC_PCIE_SNOC	541
#define SDX65_SLAVE_IMEM		542
#define SDX65_SLAVE_SERVICE_SNOC	543
#define SDX65_SLAVE_PCIE_0		544
#define SDX65_SLAVE_QDSS_STM		545
#define SDX65_SLAVE_TCU			546

#endif