Contributors: 5
Author Tokens Token Proportion Commits Commit Proportion
Linus Torvalds (pre-git) 168 67.20% 18 78.26%
Al Viro 71 28.40% 1 4.35%
David Howells 6 2.40% 2 8.70%
Akinobu Mita 4 1.60% 1 4.35%
Greg Kroah-Hartman 1 0.40% 1 4.35%
Total 250 23 


/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ALPHA_FPU_H
#define __ASM_ALPHA_FPU_H

#include <asm/special_insns.h>
#include <uapi/asm/fpu.h>

/* The following two functions don't need trapb/excb instructions
   around the mf_fpcr/mt_fpcr instructions because (a) the kernel
   never generates arithmetic faults and (b) call_pal instructions
   are implied trap barriers.  */

static inline unsigned long
rdfpcr(void)
{
	unsigned long tmp, ret;

	preempt_disable();
	if (current_thread_info()->status & TS_SAVED_FP) {
		ret = current_thread_info()->fp[31];
	} else {
#if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
		__asm__ __volatile__ (
			"ftoit $f0,%0\n\t"
			"mf_fpcr $f0\n\t"
			"ftoit $f0,%1\n\t"
			"itoft %0,$f0"
			: "=r"(tmp), "=r"(ret));
#else
		__asm__ __volatile__ (
			"stt $f0,%0\n\t"
			"mf_fpcr $f0\n\t"
			"stt $f0,%1\n\t"
			"ldt $f0,%0"
			: "=m"(tmp), "=m"(ret));
#endif
	}
	preempt_enable();

	return ret;
}

static inline void
wrfpcr(unsigned long val)
{
	unsigned long tmp;

	preempt_disable();
	if (current_thread_info()->status & TS_SAVED_FP) {
		current_thread_info()->status |= TS_RESTORE_FP;
		current_thread_info()->fp[31] = val;
	} else {
#if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
		__asm__ __volatile__ (
			"ftoit $f0,%0\n\t"
			"itoft %1,$f0\n\t"
			"mt_fpcr $f0\n\t"
			"itoft %0,$f0"
			: "=&r"(tmp) : "r"(val));
#else
		__asm__ __volatile__ (
			"stt $f0,%0\n\t"
			"ldt $f0,%1\n\t"
			"mt_fpcr $f0\n\t"
			"ldt $f0,%0"
			: "=m"(tmp) : "m"(val));
#endif
	}
	preempt_enable();
}

static inline unsigned long
swcr_update_status(unsigned long swcr, unsigned long fpcr)
{
	/* EV6 implements most of the bits in hardware.  Collect
	   the acrued exception bits from the real fpcr.  */
	if (implver() == IMPLVER_EV6) {
		swcr &= ~IEEE_STATUS_MASK;
		swcr |= (fpcr >> 35) & IEEE_STATUS_MASK;
	}
	return swcr;
}

extern unsigned long alpha_read_fp_reg (unsigned long reg);
extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
extern unsigned long alpha_read_fp_reg_s (unsigned long reg);
extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val);

#endif /* __ASM_ALPHA_FPU_H */