Contributors: 15
Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
Thomas Gleixner |
103 |
29.10% |
6 |
15.79% |
Andi Kleen |
97 |
27.40% |
5 |
13.16% |
Jack Steiner |
35 |
9.89% |
1 |
2.63% |
Ingo Molnar |
28 |
7.91% |
6 |
15.79% |
Yinghai Lu |
24 |
6.78% |
6 |
15.79% |
Cyrill V. Gorcunov |
19 |
5.37% |
1 |
2.63% |
Linus Torvalds (pre-git) |
16 |
4.52% |
2 |
5.26% |
Andrew Morton |
11 |
3.11% |
2 |
5.26% |
Alexey Y. Starikovskiy |
8 |
2.26% |
3 |
7.89% |
Denys Vlasenko |
4 |
1.13% |
1 |
2.63% |
H. Peter Anvin |
3 |
0.85% |
1 |
2.63% |
Paul Gortmaker |
2 |
0.56% |
1 |
2.63% |
James Cleverdon |
2 |
0.56% |
1 |
2.63% |
Greg Kroah-Hartman |
1 |
0.28% |
1 |
2.63% |
Jiang Liu |
1 |
0.28% |
1 |
2.63% |
Total |
354 |
|
38 |
|
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_MPSPEC_H
#define _ASM_X86_MPSPEC_H
#include <asm/mpspec_def.h>
#include <asm/x86_init.h>
#include <asm/apicdef.h>
extern int pic_mode;
#ifdef CONFIG_X86_32
/*
* Summit or generic (i.e. installer) kernels need lots of bus entries.
* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
*/
#if CONFIG_BASE_SMALL == 0
# define MAX_MP_BUSSES 260
#else
# define MAX_MP_BUSSES 32
#endif
#define MAX_IRQ_SOURCES 256
#else /* CONFIG_X86_64: */
#define MAX_MP_BUSSES 256
/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
#endif /* CONFIG_X86_64 */
#ifdef CONFIG_EISA
extern int mp_bus_id_to_type[MAX_MP_BUSSES];
#endif
extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
extern u32 boot_cpu_physical_apicid;
extern u8 boot_cpu_apic_version;
#ifdef CONFIG_X86_LOCAL_APIC
extern int smp_found_config;
#else
# define smp_found_config 0
#endif
static inline void get_smp_config(void)
{
x86_init.mpparse.get_smp_config(0);
}
static inline void early_get_smp_config(void)
{
x86_init.mpparse.get_smp_config(1);
}
static inline void find_smp_config(void)
{
x86_init.mpparse.find_smp_config();
}
#ifdef CONFIG_X86_MPPARSE
extern void e820__memblock_alloc_reserved_mpc_new(void);
extern int enable_update_mptable;
extern void default_find_smp_config(void);
extern void default_get_smp_config(unsigned int early);
#else
static inline void e820__memblock_alloc_reserved_mpc_new(void) { }
#define enable_update_mptable 0
#define default_find_smp_config x86_init_noop
#define default_get_smp_config x86_init_uint_noop
#endif
int generic_processor_info(int apicid);
#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC)
struct physid_mask {
unsigned long mask[PHYSID_ARRAY_SIZE];
};
typedef struct physid_mask physid_mask_t;
#define physid_set(physid, map) set_bit(physid, (map).mask)
#define physid_isset(physid, map) test_bit(physid, (map).mask)
#define physids_or(dst, src1, src2) \
bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
#define physids_clear(map) \
bitmap_zero((map).mask, MAX_LOCAL_APIC)
#define physids_empty(map) \
bitmap_empty((map).mask, MAX_LOCAL_APIC)
static inline void physids_promote(unsigned long physids, physid_mask_t *map)
{
physids_clear(*map);
map->mask[0] = physids;
}
static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
{
physids_clear(*map);
physid_set(physid, *map);
}
#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
extern physid_mask_t phys_cpu_present_map;
#endif /* _ASM_X86_MPSPEC_H */