Contributors: 11
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Imre Deak |
36 |
20.22% |
6 |
25.00% |
| Rodrigo Vivi |
35 |
19.66% |
2 |
8.33% |
| Jani Nikula |
30 |
16.85% |
6 |
25.00% |
| Maarten Lankhorst |
21 |
11.80% |
1 |
4.17% |
| Ville Syrjälä |
17 |
9.55% |
3 |
12.50% |
| Animesh Manna |
12 |
6.74% |
1 |
4.17% |
| Ander Conselvan de Oliveira |
12 |
6.74% |
1 |
4.17% |
| Keith Packard |
8 |
4.49% |
1 |
4.17% |
| Arun R Murthy |
4 |
2.25% |
1 |
4.17% |
| Jesse Barnes |
2 |
1.12% |
1 |
4.17% |
| Thomas Zimmermann |
1 |
0.56% |
1 |
4.17% |
| Total |
178 |
|
24 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_DP_LINK_TRAINING_H__
#define __INTEL_DP_LINK_TRAINING_H__
#include <drm/display/drm_dp_helper.h>
struct intel_crtc_state;
struct intel_dp;
int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy,
const u8 link_status[DP_LINK_STATUS_SIZE]);
void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy,
u8 dp_train_pat);
void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy);
void intel_dp_start_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_dp_stop_link_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void
intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
const u8 link_status[DP_LINK_STATUS_SIZE]);
/* Get the TPSx symbol type of the value programmed to DP_TRAINING_PATTERN_SET */
static inline u8 intel_dp_training_pattern_symbol(u8 pattern)
{
return pattern & ~DP_LINK_SCRAMBLING_DISABLE;
}
void intel_dp_128b132b_sdp_crc16(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_DP_LINK_TRAINING_H__ */