Contributors: 20
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Andi Shyti |
346 |
46.19% |
4 |
8.70% |
| Chris Wilson |
221 |
29.51% |
9 |
19.57% |
| Vinay Belgaumkar |
45 |
6.01% |
5 |
10.87% |
| Jani Nikula |
22 |
2.94% |
6 |
13.04% |
| Matt Roper |
17 |
2.27% |
2 |
4.35% |
| Kumar, Mahesh |
15 |
2.00% |
2 |
4.35% |
| Rodrigo Vivi |
12 |
1.60% |
1 |
2.17% |
| Sujaritha Sundaresan |
11 |
1.47% |
1 |
2.17% |
| Tvrtko A. Ursulin |
10 |
1.34% |
1 |
2.17% |
| Ashutosh Dixit |
9 |
1.20% |
2 |
4.35% |
| Michal Wajdeczko |
8 |
1.07% |
1 |
2.17% |
| Maarten Lankhorst |
8 |
1.07% |
2 |
4.35% |
| Imre Deak |
7 |
0.93% |
1 |
2.17% |
| Lucas De Marchi |
5 |
0.67% |
2 |
4.35% |
| Don Hiatt |
4 |
0.53% |
1 |
2.17% |
| Ville Syrjälä |
2 |
0.27% |
2 |
4.35% |
| Jesse Barnes |
2 |
0.27% |
1 |
2.17% |
| Tomeu Vizoso |
2 |
0.27% |
1 |
2.17% |
| Paulo Zanoni |
2 |
0.27% |
1 |
2.17% |
| Daniel Vetter |
1 |
0.13% |
1 |
2.17% |
| Total |
749 |
|
46 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef INTEL_RPS_H
#define INTEL_RPS_H
#include "intel_rps_types.h"
#include "i915_reg_defs.h"
struct i915_request;
struct drm_printer;
#define GT_FREQUENCY_MULTIPLIER 50
#define GEN9_FREQ_SCALER 3
void intel_rps_init_early(struct intel_rps *rps);
void intel_rps_init(struct intel_rps *rps);
void intel_rps_sanitize(struct intel_rps *rps);
void intel_rps_driver_register(struct intel_rps *rps);
void intel_rps_driver_unregister(struct intel_rps *rps);
void intel_rps_enable(struct intel_rps *rps);
void intel_rps_disable(struct intel_rps *rps);
void intel_rps_park(struct intel_rps *rps);
void intel_rps_unpark(struct intel_rps *rps);
void intel_rps_boost(struct i915_request *rq);
void intel_rps_dec_waiters(struct intel_rps *rps);
u32 intel_rps_get_boost_frequency(struct intel_rps *rps);
int intel_rps_set_boost_frequency(struct intel_rps *rps, u32 freq);
int intel_rps_set(struct intel_rps *rps, u8 val);
void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive);
int intel_gpu_freq(struct intel_rps *rps, int val);
int intel_freq_opcode(struct intel_rps *rps, int val);
u8 intel_rps_get_up_threshold(struct intel_rps *rps);
int intel_rps_set_up_threshold(struct intel_rps *rps, u8 threshold);
u8 intel_rps_get_down_threshold(struct intel_rps *rps);
int intel_rps_set_down_threshold(struct intel_rps *rps, u8 threshold);
u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps);
u32 intel_rps_get_requested_frequency(struct intel_rps *rps);
u32 intel_rps_get_min_frequency(struct intel_rps *rps);
u32 intel_rps_get_min_raw_freq(struct intel_rps *rps);
int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val);
u32 intel_rps_get_max_frequency(struct intel_rps *rps);
u32 intel_rps_get_max_raw_freq(struct intel_rps *rps);
int intel_rps_set_max_frequency(struct intel_rps *rps, u32 val);
u32 intel_rps_get_rp0_frequency(struct intel_rps *rps);
u32 intel_rps_get_rp1_frequency(struct intel_rps *rps);
u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
u32 intel_rps_read_rpstat(struct intel_rps *rps);
void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps);
void intel_rps_raise_unslice(struct intel_rps *rps);
void intel_rps_lower_unslice(struct intel_rps *rps);
u32 intel_rps_read_throttle_reason(struct intel_rps *rps);
bool rps_read_mask_mmio(struct intel_rps *rps, i915_reg_t reg32, u32 mask);
void gen6_rps_frequency_dump(struct intel_rps *rps, struct drm_printer *p);
void gen5_rps_irq_handler(struct intel_rps *rps);
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
static inline bool intel_rps_is_enabled(const struct intel_rps *rps)
{
return test_bit(INTEL_RPS_ENABLED, &rps->flags);
}
static inline void intel_rps_set_enabled(struct intel_rps *rps)
{
set_bit(INTEL_RPS_ENABLED, &rps->flags);
}
static inline void intel_rps_clear_enabled(struct intel_rps *rps)
{
clear_bit(INTEL_RPS_ENABLED, &rps->flags);
}
static inline bool intel_rps_is_active(const struct intel_rps *rps)
{
return test_bit(INTEL_RPS_ACTIVE, &rps->flags);
}
static inline void intel_rps_set_active(struct intel_rps *rps)
{
set_bit(INTEL_RPS_ACTIVE, &rps->flags);
}
static inline bool intel_rps_clear_active(struct intel_rps *rps)
{
return test_and_clear_bit(INTEL_RPS_ACTIVE, &rps->flags);
}
static inline bool intel_rps_has_interrupts(const struct intel_rps *rps)
{
return test_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
}
static inline void intel_rps_set_interrupts(struct intel_rps *rps)
{
set_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
}
static inline void intel_rps_clear_interrupts(struct intel_rps *rps)
{
clear_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
}
static inline bool intel_rps_uses_timer(const struct intel_rps *rps)
{
return test_bit(INTEL_RPS_TIMER, &rps->flags);
}
static inline void intel_rps_set_timer(struct intel_rps *rps)
{
set_bit(INTEL_RPS_TIMER, &rps->flags);
}
static inline void intel_rps_clear_timer(struct intel_rps *rps)
{
clear_bit(INTEL_RPS_TIMER, &rps->flags);
}
#endif /* INTEL_RPS_H */