Contributors: 14
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Dave Airlie |
76 |
25.33% |
3 |
6.38% |
| Jani Nikula |
68 |
22.67% |
6 |
12.77% |
| Ville Syrjälä |
63 |
21.00% |
14 |
29.79% |
| Imre Deak |
22 |
7.33% |
5 |
10.64% |
| Ander Conselvan de Oliveira |
17 |
5.67% |
5 |
10.64% |
| Chris Wilson |
12 |
4.00% |
5 |
10.64% |
| Jesse Barnes |
10 |
3.33% |
2 |
4.26% |
| José Roberto de Souza |
9 |
3.00% |
1 |
2.13% |
| Eric Anholt |
8 |
2.67% |
1 |
2.13% |
| Maarten Lankhorst |
4 |
1.33% |
1 |
2.13% |
| Zhenyu Wang |
3 |
1.00% |
1 |
2.13% |
| Dhinakaran Pandiyan |
3 |
1.00% |
1 |
2.13% |
| Chandra Konduru |
3 |
1.00% |
1 |
2.13% |
| Daniel Vetter |
2 |
0.67% |
1 |
2.13% |
| Total |
300 |
|
47 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2020 Intel Corporation
*/
#ifndef _INTEL_DPLL_H_
#define _INTEL_DPLL_H_
#include <linux/types.h>
struct dpll;
struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
enum pipe;
void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
struct intel_crtc *crtc);
int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc);
int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
void vlv_compute_dpll(struct intel_crtc_state *crtc_state);
void chv_compute_dpll(struct intel_crtc_state *crtc_state);
int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
const struct dpll *dpll);
void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
void chv_enable_pll(const struct intel_crtc_state *crtc_state);
void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
void vlv_enable_pll(const struct intel_crtc_state *crtc_state);
void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
void i9xx_enable_pll(const struct intel_crtc_state *crtc_state);
void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
struct dpll *best_clock);
int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
void vlv_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
void chv_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);
void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);
#endif