Contributors: 13
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Ville Syrjälä |
121 |
41.44% |
23 |
46.00% |
| Jani Nikula |
83 |
28.42% |
6 |
12.00% |
| Paulo Zanoni |
30 |
10.27% |
7 |
14.00% |
| Gustavo Sousa |
13 |
4.45% |
1 |
2.00% |
| Vinod Govindapillai |
10 |
3.42% |
3 |
6.00% |
| Chris Wilson |
6 |
2.05% |
2 |
4.00% |
| Dave Airlie |
6 |
2.05% |
2 |
4.00% |
| Rodrigo Vivi |
5 |
1.71% |
1 |
2.00% |
| Shashank Sharma |
5 |
1.71% |
1 |
2.00% |
| Maarten Lankhorst |
4 |
1.37% |
1 |
2.00% |
| Matt Roper |
4 |
1.37% |
1 |
2.00% |
| Imre Deak |
3 |
1.03% |
1 |
2.00% |
| Kumar, Mahesh |
2 |
0.68% |
1 |
2.00% |
| Total |
292 |
|
50 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_FBC_H__
#define __INTEL_FBC_H__
#include <linux/types.h>
enum fb_op_origin;
enum pipe;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
struct intel_dsb;
struct intel_fbc;
struct intel_plane;
struct intel_plane_state;
enum intel_fbc_id {
INTEL_FBC_A,
INTEL_FBC_B,
INTEL_FBC_C,
INTEL_FBC_D,
I915_MAX_FBCS,
};
int intel_fbc_atomic_check(struct intel_atomic_state *state);
int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state);
bool intel_fbc_pre_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_post_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_init(struct intel_display *display);
void intel_fbc_cleanup(struct intel_display *display);
void intel_fbc_sanitize(struct intel_display *display);
void intel_fbc_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_disable(struct intel_crtc *crtc);
void intel_fbc_invalidate(struct intel_display *display,
unsigned int frontbuffer_bits,
enum fb_op_origin origin);
void intel_fbc_flush(struct intel_display *display,
unsigned int frontbuffer_bits, enum fb_op_origin origin);
void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
void intel_fbc_read_underrun_dbg_info(struct intel_display *display,
enum pipe, bool log);
void intel_fbc_reset_underrun(struct intel_display *display);
void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
void intel_fbc_debugfs_register(struct intel_display *display);
void intel_fbc_prepare_dirty_rect(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_dirty_rect_update_noarm(struct intel_dsb *dsb,
struct intel_plane *plane);
bool intel_fbc_need_pixel_normalizer(const struct intel_plane_state *plane_state);
#endif /* __INTEL_FBC_H__ */