/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __MXL862XX_CMD_H #define __MXL862XX_CMD_H #define MXL862XX_MMD_DEV 30 #define MXL862XX_MMD_REG_CTRL 0 #define MXL862XX_MMD_REG_LEN_RET 1 #define MXL862XX_MMD_REG_DATA_FIRST 2 #define MXL862XX_MMD_REG_DATA_LAST 95 #define MXL862XX_MMD_REG_DATA_MAX_SIZE \ (MXL862XX_MMD_REG_DATA_LAST - MXL862XX_MMD_REG_DATA_FIRST + 1) #define MXL862XX_COMMON_MAGIC 0x100 #define MXL862XX_BRDG_MAGIC 0x300 #define MXL862XX_BRDGPORT_MAGIC 0x400 #define MXL862XX_CTP_MAGIC 0x500 #define MXL862XX_SWMAC_MAGIC 0xa00 #define MXL862XX_SS_MAGIC 0x1600 #define GPY_GPY2XX_MAGIC 0x1800 #define SYS_MISC_MAGIC 0x1900 #define MXL862XX_COMMON_CFGGET (MXL862XX_COMMON_MAGIC + 0x9) #define MXL862XX_COMMON_REGISTERMOD (MXL862XX_COMMON_MAGIC + 0x11) #define MXL862XX_BRIDGE_ALLOC (MXL862XX_BRDG_MAGIC + 0x1) #define MXL862XX_BRIDGE_CONFIGSET (MXL862XX_BRDG_MAGIC + 0x2) #define MXL862XX_BRIDGE_CONFIGGET (MXL862XX_BRDG_MAGIC + 0x3) #define MXL862XX_BRIDGE_FREE (MXL862XX_BRDG_MAGIC + 0x4) #define MXL862XX_BRIDGEPORT_ALLOC (MXL862XX_BRDGPORT_MAGIC + 0x1) #define MXL862XX_BRIDGEPORT_CONFIGSET (MXL862XX_BRDGPORT_MAGIC + 0x2) #define MXL862XX_BRIDGEPORT_CONFIGGET (MXL862XX_BRDGPORT_MAGIC + 0x3) #define MXL862XX_BRIDGEPORT_FREE (MXL862XX_BRDGPORT_MAGIC + 0x4) #define MXL862XX_CTP_PORTASSIGNMENTSET (MXL862XX_CTP_MAGIC + 0x3) #define MXL862XX_MAC_TABLECLEARCOND (MXL862XX_SWMAC_MAGIC + 0x8) #define MXL862XX_SS_SPTAG_SET (MXL862XX_SS_MAGIC + 0x02) #define INT_GPHY_READ (GPY_GPY2XX_MAGIC + 0x01) #define INT_GPHY_WRITE (GPY_GPY2XX_MAGIC + 0x02) #define SYS_MISC_FW_VERSION (SYS_MISC_MAGIC + 0x02) #define MMD_API_MAXIMUM_ID 0x7fff #endif /* __MXL862XX_CMD_H */