Contributors: 2
Author Tokens Token Proportion Commits Commit Proportion
Wesley Cheng 865 99.88% 1 50.00%
Nishad Kamdar 1 0.12% 1 50.00%
Total 866 2


/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_USB43_QSERDES_COM_V8_H_
#define QCOM_PHY_QMP_USB43_QSERDES_COM_V8_H_

#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE1		0x000
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE1		0x004
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE3_MODE1		0x008
#define QSERDES_V8_USB43_COM_CLK_EP_DIV_MODE1			0x00c
#define QSERDES_V8_USB43_COM_CP_CTRL_MODE1			0x010
#define QSERDES_V8_USB43_COM_PLL_RCTRL_MODE1			0x014
#define QSERDES_V8_USB43_COM_PLL_CCTRL_MODE1			0x018
#define QSERDES_V8_USB43_COM_CORECLK_DIV_MODE1			0x01c
#define QSERDES_V8_USB43_COM_LOCK_CMP1_MODE1			0x020
#define QSERDES_V8_USB43_COM_LOCK_CMP2_MODE1			0x024
#define QSERDES_V8_USB43_COM_DEC_START_MODE1			0x028
#define QSERDES_V8_USB43_COM_DEC_START_MSB_MODE1		0x02c
#define QSERDES_V8_USB43_COM_DIV_FRAC_START1_MODE1		0x030
#define QSERDES_V8_USB43_COM_DIV_FRAC_START2_MODE1		0x034
#define QSERDES_V8_USB43_COM_DIV_FRAC_START3_MODE1		0x038
#define QSERDES_V8_USB43_COM_HSCLK_SEL_1			0x03c
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN0_MODE1		0x040
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN1_MODE1		0x044
#define QSERDES_V8_USB43_COM_VCO_TUNE1_MODE1			0x048
#define QSERDES_V8_USB43_COM_VCO_TUNE2_MODE1			0x04c
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE1		0x050
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE1		0x054
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE0		0x058
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE0		0x05c
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE0		0x060
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE0		0x064
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE3_MODE0		0x068
#define QSERDES_V8_USB43_COM_CLK_EP_DIV_MODE0			0x06c
#define QSERDES_V8_USB43_COM_CP_CTRL_MODE0			0x070
#define QSERDES_V8_USB43_COM_PLL_RCTRL_MODE0			0x074
#define QSERDES_V8_USB43_COM_PLL_CCTRL_MODE0			0x078
#define QSERDES_V8_USB43_COM_CORECLK_DIV_MODE0			0x07c
#define QSERDES_V8_USB43_COM_LOCK_CMP1_MODE0			0x080
#define QSERDES_V8_USB43_COM_LOCK_CMP2_MODE0			0x084
#define QSERDES_V8_USB43_COM_DEC_START_MODE0			0x088
#define QSERDES_V8_USB43_COM_DEC_START_MSB_MODE0		0x08c
#define QSERDES_V8_USB43_COM_DIV_FRAC_START1_MODE0		0x090
#define QSERDES_V8_USB43_COM_DIV_FRAC_START2_MODE0		0x094
#define QSERDES_V8_USB43_COM_DIV_FRAC_START3_MODE0		0x098
#define QSERDES_V8_USB43_COM_HSCLK_HS_SWITCH_SEL_1		0x09c
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN0_MODE0		0x0a0
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN1_MODE0		0x0a4
#define QSERDES_V8_USB43_COM_VCO_TUNE1_MODE0			0x0a8
#define QSERDES_V8_USB43_COM_VCO_TUNE2_MODE0			0x0ac
#define QSERDES_V8_USB43_COM_ATB_SEL1				0x0b0
#define QSERDES_V8_USB43_COM_ATB_SEL2				0x0b4
#define QSERDES_V8_USB43_COM_FREQ_UPDATE			0x0b8
#define QSERDES_V8_USB43_COM_BG_TIMER				0x0bc
#define QSERDES_V8_USB43_COM_SSC_EN_CENTER			0x0c0
#define QSERDES_V8_USB43_COM_SSC_ADJ_PER1			0x0c4
#define QSERDES_V8_USB43_COM_SSC_ADJ_PER2			0x0c8
#define QSERDES_V8_USB43_COM_SSC_PER1				0x0cc
#define QSERDES_V8_USB43_COM_SSC_PER2				0x0d0
#define QSERDES_V8_USB43_COM_POST_DIV				0x0d4
#define QSERDES_V8_USB43_COM_POST_DIV_MUX			0x0d8
#define QSERDES_V8_USB43_COM_BIAS_EN_CLKBUFLR_EN		0x0dc
#define QSERDES_V8_USB43_COM_CLK_ENABLE1			0x0e0
#define QSERDES_V8_USB43_COM_SYS_CLK_CTRL			0x0e4
#define QSERDES_V8_USB43_COM_SYSCLK_BUF_ENABLE			0x0e8
#define QSERDES_V8_USB43_COM_PLL_EN				0x0ec
#define QSERDES_V8_USB43_COM_DEBUG_BUS_OVRD			0x0f0
#define QSERDES_V8_USB43_COM_PLL_IVCO				0x0f4
#define QSERDES_V8_USB43_COM_PLL_IVCO_MODE1			0x0f8
#define QSERDES_V8_USB43_COM_CMN_IETRIM				0x0fc
#define QSERDES_V8_USB43_COM_CMN_IPTRIM				0x100
#define QSERDES_V8_USB43_COM_EP_CLOCK_DETECT_CTRL		0x104
#define QSERDES_V8_USB43_COM_PLL_CNTRL				0x108
#define QSERDES_V8_USB43_COM_BIAS_EN_CTRL_BY_PSM		0x10c
#define QSERDES_V8_USB43_COM_SYSCLK_EN_SEL			0x110
#define QSERDES_V8_USB43_COM_CML_SYSCLK_SEL			0x114
#define QSERDES_V8_USB43_COM_RESETSM_CNTRL			0x118
#define QSERDES_V8_USB43_COM_RESETSM_CNTRL2			0x11c
#define QSERDES_V8_USB43_COM_LOCK_CMP_EN			0x120
#define QSERDES_V8_USB43_COM_LOCK_CMP_CFG			0x124
#define QSERDES_V8_USB43_COM_INTEGLOOP_INITVAL			0x128
#define QSERDES_V8_USB43_COM_INTEGLOOP_EN			0x12c
#define QSERDES_V8_USB43_COM_INTEGLOOP_P_PATH_GAIN0		0x130
#define QSERDES_V8_USB43_COM_INTEGLOOP_P_PATH_GAIN1		0x134
#define QSERDES_V8_USB43_COM_VCOCAL_DEADMAN_CTRL		0x138
#define QSERDES_V8_USB43_COM_VCO_TUNE_CTRL			0x13c
#define QSERDES_V8_USB43_COM_VCO_TUNE_MAP			0x140
#define QSERDES_V8_USB43_COM_VCO_TUNE_INITVAL1			0x144
#define QSERDES_V8_USB43_COM_VCO_TUNE_INITVAL2			0x148
#define QSERDES_V8_USB43_COM_VCO_TUNE_MINVAL1			0x14c
#define QSERDES_V8_USB43_COM_VCO_TUNE_MINVAL2			0x150
#define QSERDES_V8_USB43_COM_VCO_TUNE_MAXVAL1			0x154
#define QSERDES_V8_USB43_COM_VCO_TUNE_MAXVAL2			0x158
#define QSERDES_V8_USB43_COM_VCO_TUNE_TIMER1			0x15c
#define QSERDES_V8_USB43_COM_VCO_TUNE_TIMER2			0x160
#define QSERDES_V8_USB43_COM_CLK_SELECT				0x164
#define QSERDES_V8_USB43_COM_PLL_ANALOG				0x168
#define QSERDES_V8_USB43_COM_SW_RESET				0x16c
#define QSERDES_V8_USB43_COM_CORE_CLK_EN			0x170
#define QSERDES_V8_USB43_COM_CMN_CONFIG_1			0x174
#define QSERDES_V8_USB43_COM_CMN_CONFIG_3			0x178
#define QSERDES_V8_USB43_COM_CMN_RATE_OVERRIDE			0x17c
#define QSERDES_V8_USB43_COM_SVS_MODE_CLK_SEL			0x180
#define QSERDES_V8_USB43_COM_DEBUG_BUS_SEL			0x184
#define QSERDES_V8_USB43_COM_CMN_MISC1				0x188
#define QSERDES_V8_USB43_COM_CMN_MODE				0x18c
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD			0x190
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD1			0x194
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD2			0x198
#define QSERDES_V8_USB43_COM_VCO_DC_LEVEL_CTRL			0x19c
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_1		0x1a0
#define QSERDES_V8_USB43_COM_ADDITIONAL_CTRL_1			0x1a4
#define QSERDES_V8_USB43_COM_AUTO_GAIN_ADJ_CTRL_1		0x1a8
#define QSERDES_V8_USB43_COM_AUTO_GAIN_ADJ_CTRL_2		0x1ac
#define QSERDES_V8_USB43_COM_AUTO_GAIN_ADJ_CTRL_3		0x1b0
#define QSERDES_V8_USB43_COM_AUTO_GAIN_ADJ_CTRL_4		0x1b4
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC			0x1b8
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_2			0x1bc
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_3			0x1c0
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_4			0x1c4
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_5			0x1c8
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE1_MODE2		0x1cc
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE2_MODE2		0x1d0
#define QSERDES_V8_USB43_COM_SSC_STEP_SIZE3_MODE2		0x1d4
#define QSERDES_V8_USB43_COM_CLK_EP_DIV_MODE2			0x1d8
#define QSERDES_V8_USB43_COM_CP_CTRL_MODE2			0x1dc
#define QSERDES_V8_USB43_COM_PLL_RCTRL_MODE2			0x1e0
#define QSERDES_V8_USB43_COM_PLL_CCTRL_MODE2			0x1e4
#define QSERDES_V8_USB43_COM_CORECLK_DIV_MODE2			0x1e8
#define QSERDES_V8_USB43_COM_LOCK_CMP1_MODE2			0x1ec
#define QSERDES_V8_USB43_COM_LOCK_CMP2_MODE2			0x1f0
#define QSERDES_V8_USB43_COM_DEC_START_MODE2			0x1f4
#define QSERDES_V8_USB43_COM_DEC_START_MSB_MODE2		0x1f8
#define QSERDES_V8_USB43_COM_DIV_FRAC_START1_MODE2		0x1fc
#define QSERDES_V8_USB43_COM_DIV_FRAC_START2_MODE2		0x200
#define QSERDES_V8_USB43_COM_DIV_FRAC_START3_MODE2		0x204
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN0_MODE2		0x208
#define QSERDES_V8_USB43_COM_INTEGLOOP_GAIN1_MODE2		0x20c
#define QSERDES_V8_USB43_COM_VCO_TUNE1_MODE2			0x210
#define QSERDES_V8_USB43_COM_VCO_TUNE2_MODE2			0x214
#define QSERDES_V8_USB43_COM_PLL_IVCO_MODE2			0x218
#define QSERDES_V8_USB43_COM_HSCLK_SEL_2			0x21c
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE1_MODE2		0x220
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_CMP_CODE2_MODE2		0x224
#define QSERDES_V8_USB43_COM_HSCLK_HS_SWITCH_SEL_2		0x228
#define QSERDES_V8_USB43_COM_CMN_CONFIG_2			0x22c
#define QSERDES_V8_USB43_COM_BIN_VCOCAL_HSCLK_SEL_2		0x230
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_0			0x234
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_1			0x238
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_2			0x23c
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_3			0x240
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_4			0x244
#define QSERDES_V8_USB43_COM_IVCOCAL_CONFIG_5			0x248
#define QSERDES_V8_USB43_COM_LOCK_CMP1_EARLY_MODE0		0x24c
#define QSERDES_V8_USB43_COM_LOCK_CMP2_EARLY_MODE0		0x250
#define QSERDES_V8_USB43_COM_LOCK_CMP1_EARLY_MODE1		0x254
#define QSERDES_V8_USB43_COM_LOCK_CMP2_EARLY_MODE1		0x258
#define QSERDES_V8_USB43_COM_LOCK_CMP1_EARLY_MODE2		0x25c
#define QSERDES_V8_USB43_COM_LOCK_CMP2_EARLY_MODE2		0x260
#define QSERDES_V8_USB43_COM_EARLY_LOCK_CONFIG_0		0x264
#define QSERDES_V8_USB43_COM_EARLY_LOCK_CONFIG_1		0x268
#define QSERDES_V8_USB43_COM_ADAPTIVE_ANALOG_CONFIG		0x26c
#define QSERDES_V8_USB43_COM_CP_CTRL_ADAPTIVE_MODE0		0x270
#define QSERDES_V8_USB43_COM_PLL_RCCTRL_ADAPTIVE_MODE0		0x274
#define QSERDES_V8_USB43_COM_PLL_CCTRL_ADAPTIVE_MODE0		0x278
#define QSERDES_V8_USB43_COM_CP_CTRL_ADAPTIVE_MODE1		0x27c
#define QSERDES_V8_USB43_COM_PLL_RCCTRL_ADAPTIVE_MODE1		0x280
#define QSERDES_V8_USB43_COM_PLL_CCTRL_ADAPTIVE_MODE1		0x284
#define QSERDES_V8_USB43_COM_CP_CTRL_ADAPTIVE_MODE2		0x288
#define QSERDES_V8_USB43_COM_PLL_RCCTRL_ADAPTIVE_MODE2		0x28c
#define QSERDES_V8_USB43_COM_PLL_CCTRL_ADAPTIVE_MODE2		0x290
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD3			0x294
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD4			0x298
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD5			0x29c
#define QSERDES_V8_USB43_COM_CMN_MODE_CONTD6			0x2a0
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_6			0x2a4
#define QSERDES_V8_USB43_COM_ADDITIONAL_MISC_7			0x2a8
#define QSERDES_V8_USB43_COM_VCO_WAIT_CYCLES			0x2ac
#define QSERDES_V8_USB43_COM_BIAS_WAIT_CYCLES			0x2b0
#define QSERDES_V8_USB43_COM_AUX_CLK_PSM_ENABLE			0x2b4
#define QSERDES_V8_USB43_COM_PLL_SPARE_FOR_ECO			0x2b8
#define QSERDES_V8_USB43_COM_PLL_SPARE_FOR_ECO_1		0x2bc
#define QSERDES_V8_USB43_COM_PLL_SPARE_FOR_ECO_2		0x2c0
#define QSERDES_V8_USB43_COM_LDO_CAL_1				0x2c4
#define QSERDES_V8_USB43_COM_LDO_CAL_2				0x2c8
#define QSERDES_V8_USB43_COM_LDO_CAL_3				0x2cc
#define QSERDES_V8_USB43_COM_LDO_CAL_4				0x2d0
#define QSERDES_V8_USB43_COM_LDO_CAL_5				0x2d4
#define QSERDES_V8_USB43_COM_DCC_CAL_1				0x2d8
#define QSERDES_V8_USB43_COM_DCC_CAL_2				0x2dc
#define QSERDES_V8_USB43_COM_DCC_CAL_3				0x2e0
#define QSERDES_V8_USB43_COM_DCC_CAL_4				0x2e4
#define QSERDES_V8_USB43_COM_DCC_CAL_5				0x2e8
#define QSERDES_V8_USB43_COM_DCC_CAL_6				0x2ec
#define QSERDES_V8_USB43_COM_PSM_CAL_EN				0x2f0
#define QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_1			0x2f4
#define QSERDES_V8_USB43_COM_CLK_FWD_CONFIG_2			0x2f8
#define QSERDES_V8_USB43_COM_IP_CTRL_AND_DP_SEL			0x2fc
#define QSERDES_V8_USB43_COM_DCC_CAL_7				0x300
#define QSERDES_V8_USB43_COM_DCC_CAL_8				0x304
#define QSERDES_V8_USB43_COM_DCC_CAL_9				0x308
#define QSERDES_V8_USB43_COM_MODE_OPERATION_STATUS		0x30c
#define QSERDES_V8_USB43_COM_SYSCLK_DET_COMP_STATUS		0x310
#define QSERDES_V8_USB43_COM_CMN_STATUS				0x314
#define QSERDES_V8_USB43_COM_RESET_SM_STATUS			0x318
#define QSERDES_V8_USB43_COM_RESTRIM_CODE_STATUS		0x31c
#define QSERDES_V8_USB43_COM_PLLCAL_CODE1_STATUS		0x320
#define QSERDES_V8_USB43_COM_PLLCAL_CODE2_STATUS		0x324
#define QSERDES_V8_USB43_COM_INTEGLOOP_BINCODE_STATUS		0x328
#define QSERDES_V8_USB43_COM_DEBUG_BUS0				0x32c
#define QSERDES_V8_USB43_COM_DEBUG_BUS1				0x330
#define QSERDES_V8_USB43_COM_DEBUG_BUS2				0x334
#define QSERDES_V8_USB43_COM_DEBUG_BUS3				0x338
#define QSERDES_V8_USB43_COM_C_READY_STATUS			0x33c
#define QSERDES_V8_USB43_COM_READ_DUMMY_1			0x340
#define QSERDES_V8_USB43_COM_READ_DUMMY_2			0x344
#define QSERDES_V8_USB43_COM_READ_DUMMY_3			0x348
#define QSERDES_V8_USB43_COM_IVCO_CAL_CODE_STATUS		0x34c
#define QSERDES_V8_USB43_COM_PLL_LDO_CAL_STATUS_2		0x350
#define QSERDES_V8_USB43_COM_PLL_LDO_CAL_STATUS_3		0x354

#endif