Contributors: 15
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Imre Deak |
55 |
18.90% |
5 |
10.64% |
| Jani Nikula |
52 |
17.87% |
8 |
17.02% |
| Ville Syrjälä |
49 |
16.84% |
10 |
21.28% |
| Maarten Lankhorst |
43 |
14.78% |
5 |
10.64% |
| Chandra Konduru |
18 |
6.19% |
1 |
2.13% |
| Jouni Högander |
16 |
5.50% |
1 |
2.13% |
| Ander Conselvan de Oliveira |
16 |
5.50% |
5 |
10.64% |
| Manasi D Navare |
12 |
4.12% |
3 |
6.38% |
| Ankit Nautiyal |
11 |
3.78% |
2 |
4.26% |
| Stanislav Lisovskiy |
5 |
1.72% |
1 |
2.13% |
| Eric Anholt |
4 |
1.37% |
1 |
2.13% |
| Daniel Vetter |
3 |
1.03% |
2 |
4.26% |
| Animesh Manna |
3 |
1.03% |
1 |
2.13% |
| Chris Wilson |
2 |
0.69% |
1 |
2.13% |
| Clint Taylor |
2 |
0.69% |
1 |
2.13% |
| Total |
291 |
|
47 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2019 Intel Corporation
*/
#ifndef __INTEL_VDSC_H__
#define __INTEL_VDSC_H__
#include <linux/types.h>
struct drm_printer;
enum transcoder;
struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
struct intel_dsb;
struct intel_dsc_slice_config;
struct intel_encoder;
bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
int intel_dsc_line_slice_count(const struct intel_dsc_slice_config *config);
bool intel_dsc_get_slice_config(struct intel_display *display,
int num_joined_pipes, int slice_per_pipe,
struct intel_dsc_slice_config *config);
void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
void intel_dsc_enable_on_crtc(struct intel_crtc_state *crtc_state);
bool intel_dsc_enabled_on_link(const struct intel_crtc_state *crtc_state);
void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
enum intel_display_power_domain
intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state);
void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state, int su_lines);
void intel_vdsc_state_dump(struct drm_printer *p, int indent,
const struct intel_crtc_state *crtc_state);
int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state);
unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state);
int intel_dsc_get_pixel_rate_with_dsc_bubbles(struct intel_display *display,
int pixel_rate, int htotal,
int dsc_horizontal_slices);
#endif /* __INTEL_VDSC_H__ */