Contributors: 10
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Jani Nikula |
53 |
34.64% |
7 |
41.18% |
| Dale B Stimson |
28 |
18.30% |
1 |
5.88% |
| Chris Wilson |
26 |
16.99% |
2 |
11.76% |
| Imre Deak |
20 |
13.07% |
1 |
5.88% |
| Ashutosh Dixit |
14 |
9.15% |
1 |
5.88% |
| Ville Syrjälä |
4 |
2.61% |
1 |
5.88% |
| Matt Roper |
3 |
1.96% |
1 |
5.88% |
| Badal Nilawar |
2 |
1.31% |
1 |
5.88% |
| Clint Taylor |
2 |
1.31% |
1 |
5.88% |
| Sean Paul |
1 |
0.65% |
1 |
5.88% |
| Total |
153 |
|
17 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2013-2021 Intel Corporation
*/
#ifndef _INTEL_PCODE_H_
#define _INTEL_PCODE_H_
#include <linux/types.h>
struct drm_device;
struct intel_uncore;
int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1);
int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms);
#define snb_pcode_write(uncore, mbox, val) \
snb_pcode_write_timeout((uncore), (mbox), (val), 1)
int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request,
u32 reply_mask, u32 reply, int timeout_base_ms);
int intel_pcode_init(struct intel_uncore *uncore);
/*
* Helpers for dGfx PCODE mailbox command formatting
*/
int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val);
int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val);
extern const struct intel_display_pcode_interface i915_display_pcode_interface;
#endif /* _INTEL_PCODE_H */