Contributors: 13
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Matthew Brost |
114 |
35.74% |
1 |
3.85% |
| Michal Wajdeczko |
55 |
17.24% |
6 |
23.08% |
| Matt Roper |
53 |
16.61% |
4 |
15.38% |
| Lucas De Marchi |
25 |
7.84% |
2 |
7.69% |
| Rodrigo Vivi |
20 |
6.27% |
4 |
15.38% |
| Ilia Levi |
16 |
5.02% |
2 |
7.69% |
| Gustavo Sousa |
11 |
3.45% |
1 |
3.85% |
| Jani Nikula |
9 |
2.82% |
1 |
3.85% |
| John Harrison |
7 |
2.19% |
1 |
3.85% |
| Ville Syrjälä |
6 |
1.88% |
1 |
3.85% |
| Michael J. Ruhl |
1 |
0.31% |
1 |
3.85% |
| Michał Winiarski |
1 |
0.31% |
1 |
3.85% |
| Matthew Auld |
1 |
0.31% |
1 |
3.85% |
| Total |
319 |
|
26 |
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2021-2023 Intel Corporation
*/
#ifndef _XE_MMIO_H_
#define _XE_MMIO_H_
#include "xe_mmio_types.h"
struct xe_device;
struct xe_reg;
int xe_mmio_probe_early(struct xe_device *xe);
int xe_mmio_probe_tiles(struct xe_device *xe);
void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size);
u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val);
u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);
bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);
u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
u32 timeout_us, u32 *out_val, bool atomic);
int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
u32 val, u32 timeout_us, u32 *out_val, bool atomic);
static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
{
if (addr < mmio->adj_limit)
addr += mmio->adj_offset;
return addr;
}
#ifdef CONFIG_PCI_IOV
void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid);
#endif
#endif