Contributors: 30
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Benjamin Herrenschmidt |
130 |
29.02% |
11 |
18.03% |
| Anton Blanchard |
73 |
16.29% |
4 |
6.56% |
| Paul Mackerras |
45 |
10.04% |
5 |
8.20% |
| Bartlomiej Zolnierkiewicz |
39 |
8.71% |
1 |
1.64% |
| John Rose |
23 |
5.13% |
2 |
3.28% |
| Matthew Wilcox |
21 |
4.69% |
4 |
6.56% |
| Linas Vepstas |
19 |
4.24% |
3 |
4.92% |
| David Woodhouse |
15 |
3.35% |
3 |
4.92% |
| Stephen Rothwell |
15 |
3.35% |
2 |
3.28% |
| Andrew Morton |
11 |
2.46% |
4 |
6.56% |
| Linus Torvalds (pre-git) |
8 |
1.79% |
2 |
3.28% |
| Grant C. Likely |
8 |
1.79% |
1 |
1.64% |
| Kumar Gala |
6 |
1.34% |
1 |
1.64% |
| Russell King |
4 |
0.89% |
1 |
1.64% |
| Patrick Mochel |
4 |
0.89% |
1 |
1.64% |
| Björn Helgaas |
3 |
0.67% |
1 |
1.64% |
| Christoph Hellwig |
3 |
0.67% |
2 |
3.28% |
| Matt Porter |
3 |
0.67% |
1 |
1.64% |
| Nathan Fontenot |
3 |
0.67% |
1 |
1.64% |
| Bryant G. Ly |
2 |
0.45% |
1 |
1.64% |
| Michael Ellerman |
2 |
0.45% |
1 |
1.64% |
| Thomas Gleixner |
2 |
0.45% |
1 |
1.64% |
| Becky Bruce |
2 |
0.45% |
1 |
1.64% |
| Roland Dreier |
1 |
0.22% |
1 |
1.64% |
| Josh Boyer |
1 |
0.22% |
1 |
1.64% |
| Nick Child |
1 |
0.22% |
1 |
1.64% |
| Bart Van Assche |
1 |
0.22% |
1 |
1.64% |
| Daniel Axtens |
1 |
0.22% |
1 |
1.64% |
| FUJITA Tomonori |
1 |
0.22% |
1 |
1.64% |
| Rob Herring |
1 |
0.22% |
1 |
1.64% |
| Total |
448 |
|
61 |
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef __ASM_POWERPC_PCI_H
#define __ASM_POWERPC_PCI_H
#ifdef __KERNEL__
/*
*/
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/dma-map-ops.h>
#include <linux/scatterlist.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/pci-bridge.h>
/* Return values for pci_controller_ops.probe_mode function */
#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x10000000
/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
#define IOBASE_BRIDGE_NUMBER 0
#define IOBASE_MEMORY 1
#define IOBASE_IO 2
#define IOBASE_ISA_IO 3
#define IOBASE_ISA_MEM 4
/*
* Set this to 1 if you want the kernel to re-assign all PCI
* bus numbers (don't do that on ppc64 yet !)
*/
#define pcibios_assign_all_busses() \
(pci_has_flag(PCI_REASSIGN_ALL_BUS))
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
if (ppc_md.pci_get_legacy_ide_irq)
return ppc_md.pci_get_legacy_ide_irq(dev, channel);
return channel ? 15 : 14;
}
#ifdef CONFIG_PCI
void __init set_pci_dma_ops(const struct dma_map_ops *dma_ops);
#else /* CONFIG_PCI */
#define set_pci_dma_ops(d)
#endif
#ifdef CONFIG_PPC64
/*
* We want to avoid touching the cacheline size or MWI bit.
* pSeries firmware sets the cacheline size (which is not the cpu cacheline
* size in all cases) and hardware treats MWI the same as memory write.
*/
#define PCI_DISABLE_MWI
#endif /* CONFIG_PPC64 */
extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
struct vm_area_struct;
/* Tell PCI code what kind of PCI resource mappings we support */
#define HAVE_PCI_MMAP 1
#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
#define arch_can_pci_mmap_io() 1
#define arch_can_pci_mmap_wc() 1
extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
size_t count);
extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
size_t count);
extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state);
#define HAVE_PCI_LEGACY 1
extern void pcibios_claim_one_bus(struct pci_bus *b);
extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
extern void pcibios_resource_survey(void);
extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
extern int remove_phb_dynamic(struct pci_controller *phb);
extern struct pci_dev *of_create_pci_dev(struct device_node *node,
struct pci_bus *bus, int devfn);
extern unsigned int pci_parse_of_flags(u32 addr0, int bridge);
extern void of_scan_pci_bridge(struct pci_dev *dev);
extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
extern pgprot_t pci_phys_mem_access_prot(unsigned long pfn,
unsigned long size,
pgprot_t prot);
extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
extern void pcibios_setup_bus_self(struct pci_bus *bus);
extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
extern void pcibios_scan_phb(struct pci_controller *hose);
#endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_PCI_H */