Contributors: 9
Author Tokens Token Proportion Commits Commit Proportion
Matthew Brost 166 54.43% 1 5.56%
Rodrigo Vivi 63 20.66% 3 16.67%
Vinay Belgaumkar 49 16.07% 7 38.89%
Ashutosh Dixit 9 2.95% 1 5.56%
Riana Tauro 6 1.97% 2 11.11%
Matthew Auld 4 1.31% 1 5.56%
Michal Wajdeczko 4 1.31% 1 5.56%
Badal Nilawar 3 0.98% 1 5.56%
Raag Jadav 1 0.33% 1 5.56%
Total 305 18 


/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2022 Intel Corporation
 */

#ifndef _XE_GUC_PC_H_
#define _XE_GUC_PC_H_

#include <linux/types.h>

struct xe_guc_pc;
struct drm_printer;

int xe_guc_pc_init(struct xe_guc_pc *pc);
int xe_guc_pc_start(struct xe_guc_pc *pc);
void xe_guc_pc_stop(struct xe_guc_pc *pc);
void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
int xe_guc_pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value);
int xe_guc_pc_action_unset_param(struct xe_guc_pc *pc, u8 id);

u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
u32 xe_guc_pc_get_cur_freq_fw(struct xe_guc_pc *pc);
u32 xe_guc_pc_get_rp0_freq(struct xe_guc_pc *pc);
u32 xe_guc_pc_get_rpa_freq(struct xe_guc_pc *pc);
u32 xe_guc_pc_get_rpe_freq(struct xe_guc_pc *pc);
u32 xe_guc_pc_get_rpn_freq(struct xe_guc_pc *pc);
int xe_guc_pc_get_min_freq(struct xe_guc_pc *pc, u32 *freq);
int xe_guc_pc_set_min_freq(struct xe_guc_pc *pc, u32 freq);
int xe_guc_pc_get_max_freq(struct xe_guc_pc *pc, u32 *freq);
int xe_guc_pc_set_max_freq(struct xe_guc_pc *pc, u32 freq);
int xe_guc_pc_set_power_profile(struct xe_guc_pc *pc, const char *buf);
void xe_guc_pc_get_power_profile(struct xe_guc_pc *pc, char *profile);

enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
u64 xe_guc_pc_mc6_residency(struct xe_guc_pc *pc);
void xe_guc_pc_init_early(struct xe_guc_pc *pc);
int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc);
void xe_guc_pc_raise_unslice(struct xe_guc_pc *pc);
void xe_guc_pc_apply_flush_freq_limit(struct xe_guc_pc *pc);
void xe_guc_pc_remove_flush_freq_limit(struct xe_guc_pc *pc);

#endif /* _XE_GUC_PC_H_ */